Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	133729	1			T73	145		T74	7		T78	21
values[2]	10265	1			T73	1		T262	1		T557	1
values[3]	4241	1			T634	1		T496	3		T465	2
values[4]	2397	1			T496	8		T770	5		T433	2
values[5]	1570	1			T496	13		T770	1		T433	2
values[6]	1028	1			T496	10		T433	2		T450	5
values[7]	624	1			T496	7		T433	2		T509	1
values[8]	502	1			T496	10		T433	2		T509	2
values[9]	410	1			T496	11		T433	2		T509	1
values[10]	325	1			T496	6		T433	2		T509	1
values[11]	352	1			T496	5		T433	2		T509	3
values[12]	281	1			T496	6		T433	2		T509	5
values[13]	277	1			T496	6		T433	2		T509	1
values[14]	285	1			T496	4		T433	2		T509	3
values[15]	248	1			T496	3		T433	2		T509	2
values[16]	288	1			T496	5		T433	2		T509	1
values[17]	303	1			T496	3		T433	2		T509	2
values[18]	310	1			T496	9		T433	2		T509	2
values[19]	261	1			T496	13		T433	2		T509	3
values[20]	251	1			T496	6		T433	2		T509	3
values[21]	272	1			T496	3		T433	2		T509	1
values[22]	233	1			T496	4		T433	2		T509	3
values[23]	287	1			T496	8		T433	2		T509	4
values[24]	270	1			T496	20		T433	2		T509	1
values[25]	266	1			T496	9		T433	2		T509	3
values[26]	263	1			T496	6		T433	2		T509	4
values[27]	241	1			T496	9		T433	2		T509	1
values[28]	236	1			T496	8		T433	2		T509	6
values[29]	275	1			T496	11		T433	2		T509	1
values[30]	276	1			T496	7		T433	2		T509	3
values[31]	285	1			T496	3		T433	2		T509	1
values[32]	266	1			T496	5		T433	2		T509	4
values[33]	253	1			T496	28		T433	2		T509	1
values[34]	249	1			T496	7		T433	2		T509	2
values[35]	223	1			T496	5		T433	2		T509	2
values[36]	208	1			T496	4		T433	2		T509	1
values[37]	221	1			T496	4		T433	2		T509	1
values[38]	271	1			T496	16		T433	2		T509	2
values[39]	285	1			T496	7		T433	3		T509	1
values[40]	282	1			T496	3		T433	2		T509	1
values[41]	331	1			T496	14		T433	2		T509	1
values[42]	256	1			T496	6		T433	2		T509	5
values[43]	237	1			T496	3		T433	2		T509	6
values[44]	236	1			T496	6		T433	2		T509	2
values[45]	226	1			T496	2		T433	2		T509	1
values[46]	191	1			T496	10		T433	2		T509	3
values[47]	198	1			T496	16		T433	2		T509	1
values[48]	202	1			T496	8		T433	2		T509	2
values[49]	217	1			T496	4		T433	3		T509	1
values[50]	219	1			T496	7		T433	2		T509	2
values[51]	272	1			T496	11		T433	2		T509	1
values[52]	226	1			T496	4		T433	2		T509	4
values[53]	211	1			T496	8		T433	2		T509	4
values[54]	188	1			T433	2		T509	1		T458	1
values[55]	226	1			T433	2		T509	2		T458	1
values[56]	192	1			T433	2		T509	2		T458	1
values[57]	199	1			T433	2		T509	2		T458	1
values[58]	205	1			T433	2		T509	8		T458	1
values[59]	175	1			T433	2		T509	11		T458	1
values[60]	152	1			T433	2		T509	8		T458	1
values[61]	165	1			T433	2		T509	5		T458	1
values[62]	186	1			T433	2		T509	2		T458	1
values[63]	172	1			T433	2		T509	3		T458	1
values[64]	162	1			T433	2		T509	1		T458	1
values[65]	148	1			T433	2		T509	2		T458	1
values[66]	136	1			T433	2		T509	1		T458	1
values[67]	112	1			T433	2		T509	2		T458	1
values[68]	115	1			T433	2		T509	2		T458	1
values[69]	112	1			T433	2		T509	4		T458	1
values[70]	95	1			T433	2		T509	5		T458	1
values[71]	69	1			T433	2		T509	3		T458	1
values[72]	80	1			T433	3		T509	3		T458	1
values[73]	55	1			T433	2		T509	2		T458	1
values[74]	73	1			T433	2		T509	1		T458	1
values[75]	49	1			T433	2		T509	2		T458	1
values[76]	47	1			T433	2		T509	1		T458	1
values[77]	65	1			T433	2		T509	2		T458	1
values[78]	48	1			T433	2		T509	1		T458	1
values[79]	59	1			T433	2		T509	1		T458	1
values[80]	49	1			T433	2		T509	3		T458	1
values[81]	53	1			T433	2		T509	5		T458	1
values[82]	65	1			T433	2		T509	5		T458	1
values[83]	60	1			T433	2		T509	2		T458	1
values[84]	61	1			T433	2		T509	5		T458	1
values[85]	58	1			T433	2		T509	2		T458	1
values[86]	57	1			T433	2		T509	2		T458	1
values[87]	66	1			T433	2		T509	2		T458	1
values[88]	64	1			T433	2		T509	1		T458	1
values[89]	65	1			T433	2		T509	1		T458	1
values[90]	60	1			T433	2		T509	2		T458	1
values[91]	67	1			T433	2		T509	2		T458	1
values[92]	66	1			T433	2		T509	2		T458	1
values[93]	54	1			T433	2		T509	2		T458	1
values[94]	68	1			T433	2		T509	1		T458	1
values[95]	64	1			T433	2		T509	1		T458	1
values[96]	71	1			T433	2		T509	6		T458	1
values[97]	82	1			T433	2		T509	6		T458	1
values[98]	70	1			T433	2		T509	13		T458	1
values[99]	59	1			T433	2		T509	7		T458	1
values[100]	55	1			T433	2		T509	2		T458	1
values[101]	66	1			T433	2		T509	2		T458	1
values[102]	55	1			T433	2		T509	1		T458	2
values[103]	68	1			T433	2		T509	1		T458	1
values[104]	61	1			T433	2		T509	1		T458	1
values[105]	58	1			T433	2		T509	2		T458	1
values[106]	63	1			T433	2		T509	2		T458	1
values[107]	55	1			T433	2		T509	1		T458	1
values[108]	64	1			T433	2		T509	2		T458	1
values[109]	63	1			T433	2		T509	5		T458	1
values[110]	65	1			T433	2		T509	7		T458	1
values[111]	72	1			T433	2		T509	3		T458	2
values[112]	65	1			T433	4		T509	2		T458	1
values[113]	63	1			T433	4		T509	1		T458	1
values[114]	62	1			T433	2		T509	2		T458	2
values[115]	82	1			T433	4		T509	6		T458	1
values[116]	62	1			T433	4		T509	10		T458	1
values[117]	53	1			T433	2		T509	5		T458	1
values[118]	69	1			T433	4		T509	4		T458	2
values[119]	66	1			T433	4		T509	2		T458	1
values[120]	63	1			T433	2		T509	1		T458	5
values[121]	62	1			T433	2		T509	1		T458	4
values[122]	59	1			T433	4		T509	3		T458	2
values[123]	69	1			T433	2		T509	2		T458	1
values[124]	66	1			T433	5		T509	3		T458	2
values[125]	71	1			T433	3		T509	11		T458	3
values[126]	98	1			T433	2		T509	34		T458	6
values[127]	817	1			T433	56		T509	87		T458	45
values[128]	6880	1			T433	542		T509	31		T458	387