Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_timer_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	131651	1			T73	154		T74	3		T78	12
values[2]	7833	1			T74	1		T262	2		T549	1
values[3]	2781	1			T262	1		T432	11		T465	1
values[4]	1686	1			T432	1		T770	4		T930	1
values[5]	1019	1			T432	2		T770	19		T930	1
values[6]	757	1			T432	1		T770	8		T930	1
values[7]	582	1			T432	2		T770	3		T930	1
values[8]	420	1			T432	3		T770	13		T930	1
values[9]	344	1			T432	6		T770	10		T930	1
values[10]	334	1			T432	7		T770	3		T930	1
values[11]	315	1			T432	2		T770	9		T930	1
values[12]	279	1			T432	2		T770	11		T930	1
values[13]	290	1			T432	2		T770	4		T930	1
values[14]	273	1			T432	2		T770	9		T930	1
values[15]	309	1			T432	6		T770	14		T930	1
values[16]	326	1			T432	13		T770	5		T930	1
values[17]	291	1			T432	5		T770	7		T930	1
values[18]	286	1			T432	10		T770	8		T930	1
values[19]	326	1			T432	7		T770	15		T930	1
values[20]	242	1			T432	1		T770	4		T930	1
values[21]	269	1			T432	3		T770	4		T930	1
values[22]	284	1			T432	4		T770	8		T930	1
values[23]	239	1			T432	4		T770	6		T930	1
values[24]	266	1			T432	5		T770	9		T930	1
values[25]	265	1			T432	7		T770	8		T930	1
values[26]	271	1			T432	9		T770	5		T930	1
values[27]	273	1			T432	8		T770	6		T930	1
values[28]	281	1			T432	7		T770	3		T930	1
values[29]	275	1			T432	8		T770	8		T930	1
values[30]	234	1			T432	2		T770	6		T930	1
values[31]	268	1			T432	6		T770	3		T930	1
values[32]	254	1			T432	3		T770	10		T930	1
values[33]	228	1			T432	3		T770	3		T930	1
values[34]	239	1			T432	2		T770	12		T930	1
values[35]	266	1			T432	7		T770	3		T930	1
values[36]	279	1			T432	8		T770	5		T930	1
values[37]	224	1			T432	3		T770	3		T930	1
values[38]	260	1			T432	2		T770	5		T930	1
values[39]	219	1			T432	2		T770	9		T930	1
values[40]	263	1			T432	2		T770	7		T930	1
values[41]	239	1			T432	3		T770	21		T930	1
values[42]	248	1			T432	12		T770	7		T930	1
values[43]	241	1			T432	7		T770	8		T930	1
values[44]	260	1			T432	5		T770	7		T930	1
values[45]	226	1			T432	4		T770	4		T930	1
values[46]	203	1			T432	3		T770	6		T930	1
values[47]	214	1			T432	1		T770	7		T930	1
values[48]	225	1			T770	2		T930	1		T910	1
values[49]	224	1			T770	6		T930	1		T910	1
values[50]	185	1			T770	12		T930	1		T910	1
values[51]	161	1			T770	4		T930	1		T910	1
values[52]	188	1			T770	3		T930	1		T910	1
values[53]	185	1			T770	3		T930	1		T910	1
values[54]	210	1			T770	14		T930	1		T910	1
values[55]	224	1			T770	5		T930	1		T910	1
values[56]	184	1			T770	16		T930	1		T910	1
values[57]	191	1			T770	3		T930	1		T910	1
values[58]	183	1			T770	4		T930	1		T910	1
values[59]	214	1			T770	6		T930	1		T910	1
values[60]	225	1			T770	22		T930	1		T910	1
values[61]	177	1			T930	1		T910	1		T497	9
values[62]	161	1			T930	1		T910	1		T497	8
values[63]	187	1			T930	1		T910	1		T497	15
values[64]	185	1			T930	1		T910	1		T497	7
values[65]	183	1			T930	1		T910	1		T922	5
values[66]	205	1			T930	1		T910	1		T922	1
values[67]	138	1			T930	1		T910	1		T922	1
values[68]	164	1			T930	1		T910	1		T922	4
values[69]	129	1			T930	1		T910	1		T922	2
values[70]	113	1			T930	1		T910	1		T922	4
values[71]	119	1			T930	1		T910	1		T922	10
values[72]	105	1			T930	1		T910	1		T922	2
values[73]	98	1			T930	1		T910	1		T922	3
values[74]	101	1			T930	1		T910	1		T922	2
values[75]	87	1			T930	1		T910	1		T922	2
values[76]	101	1			T930	1		T910	1		T922	2
values[77]	95	1			T930	1		T910	1		T922	1
values[78]	91	1			T930	1		T910	1		T922	2
values[79]	85	1			T930	1		T910	1		T922	1
values[80]	68	1			T930	1		T910	3		T922	2
values[81]	69	1			T930	1		T910	2		T922	4
values[82]	71	1			T930	1		T910	1		T922	2
values[83]	95	1			T930	1		T910	8		T922	3
values[84]	98	1			T930	1		T910	14		T922	6
values[85]	66	1			T930	1		T910	3		T922	7
values[86]	67	1			T930	1		T910	6		T922	14
values[87]	59	1			T930	1		T910	1		T922	5
values[88]	56	1			T930	1		T910	6		T922	1
values[89]	70	1			T930	1		T910	10		T922	6
values[90]	54	1			T930	1		T910	7		T922	7
values[91]	53	1			T930	1		T910	1		T922	3
values[92]	58	1			T930	1		T910	1		T922	3
values[93]	68	1			T930	1		T910	1		T922	4
values[94]	61	1			T930	1		T910	3		T922	2
values[95]	74	1			T930	1		T910	1		T922	5
values[96]	57	1			T930	1		T910	1		T922	6
values[97]	69	1			T930	1		T910	1		T922	7
values[98]	69	1			T930	2		T910	2		T922	6
values[99]	59	1			T930	1		T910	2		T922	4
values[100]	63	1			T930	1		T910	2		T922	1
values[101]	69	1			T930	1		T910	1		T922	6
values[102]	55	1			T930	1		T910	2		T922	4
values[103]	61	1			T930	1		T910	2		T922	2
values[104]	71	1			T930	1		T910	2		T922	4
values[105]	73	1			T930	1		T910	2		T922	2
values[106]	73	1			T930	1		T910	5		T922	6
values[107]	72	1			T930	1		T910	2		T922	7
values[108]	65	1			T930	1		T910	1		T922	1
values[109]	65	1			T930	1		T910	3		T922	3
values[110]	55	1			T930	1		T910	2		T922	1
values[111]	67	1			T930	1		T910	1		T922	4
values[112]	80	1			T930	1		T910	3		T922	3
values[113]	75	1			T930	1		T910	1		T922	6
values[114]	72	1			T930	1		T910	2		T922	3
values[115]	62	1			T930	1		T910	1		T922	4
values[116]	86	1			T930	1		T910	3		T922	2
values[117]	63	1			T930	1		T910	1		T922	4
values[118]	68	1			T930	2		T910	5		T922	3
values[119]	85	1			T930	6		T910	1		T922	5
values[120]	71	1			T930	1		T910	1		T922	9
values[121]	75	1			T930	1		T910	3		T922	4
values[122]	93	1			T930	6		T910	2		T922	2
values[123]	80	1			T930	9		T910	3		T922	2
values[124]	84	1			T930	2		T910	3		T922	2
values[125]	88	1			T930	1		T910	1		T922	9
values[126]	179	1			T930	2		T910	7		T922	15
values[127]	1005	1			T930	33		T910	26		T922	45
values[128]	7500	1			T930	301		T910	250		T922	30