Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_host1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	134622	1			T73	130		T74	5		T78	17
values[2]	7213	1			T73	1		T125	38		T262	2
values[3]	2850	1			T125	26		T548	1		T557	2
values[4]	1798	1			T125	18		T548	1		T836	1
values[5]	1302	1			T125	25		T548	1		T836	1
values[6]	887	1			T125	12		T548	1		T836	1
values[7]	685	1			T125	18		T548	1		T836	1
values[8]	571	1			T125	19		T548	1		T836	1
values[9]	566	1			T125	14		T548	1		T836	2
values[10]	473	1			T125	22		T548	1		T836	1
values[11]	516	1			T125	14		T548	1		T836	1
values[12]	432	1			T125	13		T548	1		T836	1
values[13]	387	1			T125	6		T548	1		T836	1
values[14]	415	1			T548	1		T836	1		T782	5
values[15]	407	1			T548	1		T836	1		T782	5
values[16]	361	1			T548	1		T836	1		T782	3
values[17]	362	1			T548	1		T836	1		T782	2
values[18]	358	1			T548	1		T836	1		T782	1
values[19]	401	1			T548	1		T836	1		T782	3
values[20]	370	1			T548	1		T836	1		T782	2
values[21]	395	1			T548	1		T836	1		T782	1
values[22]	349	1			T548	1		T836	1		T782	1
values[23]	350	1			T548	1		T836	1		T782	2
values[24]	299	1			T548	1		T836	1		T782	1
values[25]	275	1			T548	1		T836	1		T782	3
values[26]	300	1			T548	1		T836	1		T782	5
values[27]	331	1			T548	1		T836	1		T782	3
values[28]	349	1			T548	1		T836	1		T782	2
values[29]	281	1			T548	1		T836	1		T782	1
values[30]	288	1			T548	1		T836	1		T782	1
values[31]	271	1			T548	1		T836	1		T782	3
values[32]	258	1			T548	1		T836	1		T782	5
values[33]	255	1			T548	1		T836	1		T782	9
values[34]	314	1			T548	1		T836	1		T782	5
values[35]	258	1			T548	1		T836	1		T782	1
values[36]	324	1			T548	1		T836	1		T782	4
values[37]	290	1			T548	1		T836	1		T782	3
values[38]	277	1			T548	1		T836	1		T782	8
values[39]	268	1			T548	1		T836	1		T782	6
values[40]	224	1			T548	1		T836	1		T782	5
values[41]	231	1			T548	1		T836	1		T782	10
values[42]	256	1			T548	1		T836	1		T782	4
values[43]	218	1			T548	1		T836	1		T782	4
values[44]	242	1			T548	1		T836	1		T782	7
values[45]	272	1			T548	1		T836	1		T782	7
values[46]	212	1			T548	1		T836	1		T782	2
values[47]	223	1			T548	1		T836	1		T782	3
values[48]	236	1			T548	1		T836	1		T782	2
values[49]	147	1			T548	1		T836	1		T782	2
values[50]	166	1			T548	1		T836	2		T782	11
values[51]	153	1			T548	1		T836	1		T782	11
values[52]	112	1			T548	1		T836	1		T782	2
values[53]	106	1			T548	1		T836	1		T782	2
values[54]	116	1			T548	1		T836	1		T782	1
values[55]	101	1			T548	1		T836	1		T782	4
values[56]	111	1			T548	1		T836	1		T782	1
values[57]	105	1			T548	1		T836	1		T782	3
values[58]	105	1			T548	1		T836	1		T782	6
values[59]	119	1			T548	1		T836	1		T782	3
values[60]	106	1			T548	1		T836	1		T782	2
values[61]	115	1			T548	1		T836	1		T782	8
values[62]	114	1			T548	1		T836	1		T782	8
values[63]	94	1			T548	1		T836	1		T782	6
values[64]	110	1			T548	1		T836	1		T782	1
values[65]	108	1			T548	1		T836	1		T782	1
values[66]	123	1			T548	1		T836	1		T782	3
values[67]	99	1			T548	1		T836	1		T782	2
values[68]	111	1			T548	1		T836	1		T782	2
values[69]	112	1			T548	1		T836	1		T782	2
values[70]	128	1			T548	1		T836	1		T782	7
values[71]	108	1			T548	1		T836	1		T782	7
values[72]	85	1			T548	1		T836	1		T782	5
values[73]	88	1			T548	1		T836	1		T782	2
values[74]	75	1			T548	1		T836	1		T782	3
values[75]	90	1			T548	1		T836	1		T782	4
values[76]	96	1			T548	1		T836	1		T782	9
values[77]	115	1			T548	1		T836	1		T782	5
values[78]	103	1			T548	1		T836	1		T782	4
values[79]	69	1			T548	1		T836	1		T782	4
values[80]	113	1			T548	1		T836	1		T782	6
values[81]	102	1			T548	1		T836	1		T782	3
values[82]	108	1			T548	1		T836	1		T782	6
values[83]	122	1			T548	1		T836	1		T782	8
values[84]	133	1			T548	1		T836	1		T782	14
values[85]	156	1			T548	1		T836	1		T782	13
values[86]	130	1			T548	1		T836	1		T782	11
values[87]	94	1			T548	1		T836	1		T782	4
values[88]	120	1			T548	2		T836	1		T782	6
values[89]	89	1			T548	5		T836	1		T782	2
values[90]	85	1			T548	4		T836	1		T782	7
values[91]	101	1			T548	2		T836	1		T782	10
values[92]	98	1			T548	6		T836	1		T782	7
values[93]	117	1			T548	3		T836	1		T782	9
values[94]	118	1			T548	3		T836	1		T782	3
values[95]	96	1			T548	4		T836	1		T782	4
values[96]	70	1			T548	2		T836	1		T782	3
values[97]	96	1			T548	1		T836	1		T782	5
values[98]	85	1			T548	1		T836	1		T782	8
values[99]	74	1			T548	2		T836	1		T782	5
values[100]	85	1			T548	4		T836	1		T782	4
values[101]	78	1			T548	3		T836	1		T782	3
values[102]	85	1			T548	1		T836	1		T782	8
values[103]	62	1			T548	1		T836	1		T782	5
values[104]	82	1			T548	2		T836	1		T782	3
values[105]	82	1			T548	3		T836	1		T782	2
values[106]	79	1			T548	3		T836	7		T782	8
values[107]	73	1			T548	1		T836	2		T782	3
values[108]	69	1			T548	4		T836	3		T782	12
values[109]	67	1			T548	1		T836	4		T782	7
values[110]	78	1			T548	1		T836	7		T782	4
values[111]	60	1			T548	1		T836	1		T511	13
values[112]	56	1			T548	2		T836	2		T511	9
values[113]	39	1			T548	4		T836	2		T511	5
values[114]	59	1			T548	3		T836	1		T511	11
values[115]	60	1			T548	3		T836	1		T511	6
values[116]	50	1			T548	1		T836	1		T511	3
values[117]	48	1			T548	1		T836	1		T511	2
values[118]	66	1			T548	2		T836	1		T511	18
values[119]	61	1			T548	1		T836	3		T511	8
values[120]	70	1			T548	1		T836	2		T511	8
values[121]	67	1			T548	4		T836	2		T511	4
values[122]	71	1			T548	2		T836	1		T511	12
values[123]	72	1			T548	2		T836	2		T511	21
values[124]	75	1			T548	1		T836	1		T511	23
values[125]	89	1			T548	1		T836	1		T511	34
values[126]	179	1			T548	7		T836	13		T511	42
values[127]	1451	1			T548	57		T836	81		T511	54
values[128]	6477	1			T548	275		T836	306		T511	11