Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_main__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	148059	1			T73	121		T74	6		T78	23
values[2]	4332	1			T262	1		T557	7		T434	2
values[3]	1986	1			T557	2		T646	1		T448	1
values[4]	1334	1			T512	2		T775	27		T511	1
values[5]	1121	1			T512	2		T775	24		T511	2
values[6]	1023	1			T512	2		T775	13		T511	3
values[7]	890	1			T775	38		T511	3		T943	16
values[8]	783	1			T775	50		T511	2		T943	8
values[9]	639	1			T775	59		T511	2		T616	9
values[10]	686	1			T775	42		T511	3		T616	19
values[11]	750	1			T775	8		T511	1		T616	7
values[12]	706	1			T775	6		T511	4		T616	15
values[13]	619	1			T775	4		T511	1		T616	22
values[14]	451	1			T775	4		T511	6		T616	15
values[15]	345	1			T511	5		T616	17		T944	17
values[16]	363	1			T511	3		T616	8		T944	20
values[17]	368	1			T511	3		T616	1		T944	3
values[18]	361	1			T511	3		T945	13		T651	8
values[19]	388	1			T511	5		T945	9		T651	12
values[20]	338	1			T511	1		T945	12		T651	7
values[21]	300	1			T511	2		T945	37		T651	6
values[22]	273	1			T511	2		T945	48		T651	6
values[23]	267	1			T511	3		T945	51		T651	14
values[24]	234	1			T511	3		T945	34		T651	31
values[25]	224	1			T511	1		T945	28		T651	24
values[26]	239	1			T511	1		T945	17		T651	28
values[27]	174	1			T511	4		T945	9		T651	35
values[28]	122	1			T511	2		T945	7		T651	22
values[29]	80	1			T511	2		T651	16		T946	2
values[30]	82	1			T511	2		T651	21		T946	2
values[31]	108	1			T511	3		T651	28		T946	3
values[32]	95	1			T511	1		T651	27		T946	2
values[33]	67	1			T511	3		T651	3		T946	1
values[34]	65	1			T511	2		T946	9		T947	2
values[35]	64	1			T511	2		T946	2		T947	2
values[36]	65	1			T511	1		T946	3		T947	2
values[37]	53	1			T511	4		T946	1		T947	2
values[38]	61	1			T511	4		T946	2		T947	2
values[39]	48	1			T511	1		T946	1		T947	2
values[40]	46	1			T511	4		T946	2		T947	2
values[41]	31	1			T511	2		T946	5		T947	2
values[42]	30	1			T511	1		T946	3		T947	2
values[43]	29	1			T511	3		T946	4		T947	2
values[44]	29	1			T511	2		T946	3		T947	2
values[45]	32	1			T511	4		T946	1		T947	2
values[46]	29	1			T511	1		T946	1		T947	2
values[47]	30	1			T511	3		T946	2		T947	2
values[48]	34	1			T511	4		T946	6		T947	2
values[49]	31	1			T511	4		T946	1		T947	2
values[50]	24	1			T511	1		T946	1		T947	2
values[51]	29	1			T511	3		T946	2		T947	2
values[52]	26	1			T511	1		T946	2		T947	2
values[53]	29	1			T511	1		T946	2		T947	2
values[54]	32	1			T511	1		T946	3		T947	2
values[55]	27	1			T511	1		T946	2		T947	2
values[56]	33	1			T511	3		T946	2		T947	2
values[57]	31	1			T511	2		T946	1		T947	2
values[58]	34	1			T511	1		T946	1		T947	2
values[59]	30	1			T511	1		T946	2		T947	2
values[60]	25	1			T511	3		T946	2		T947	2
values[61]	30	1			T511	3		T946	2		T947	2
values[62]	35	1			T511	2		T946	6		T947	2
values[63]	33	1			T511	1		T946	5		T947	2
values[64]	28	1			T511	2		T946	1		T947	2
values[65]	27	1			T511	1		T946	2		T947	2
values[66]	31	1			T511	3		T946	4		T947	2
values[67]	29	1			T511	1		T946	2		T947	2
values[68]	26	1			T511	1		T946	3		T947	2
values[69]	32	1			T511	2		T946	3		T947	2
values[70]	29	1			T511	1		T946	3		T947	2
values[71]	32	1			T511	4		T946	1		T947	2
values[72]	31	1			T511	6		T946	1		T947	2
values[73]	29	1			T511	1		T946	3		T947	2
values[74]	34	1			T511	3		T946	2		T947	2
values[75]	42	1			T511	5		T946	5		T947	2
values[76]	35	1			T511	2		T946	3		T947	2
values[77]	42	1			T511	6		T946	9		T947	2
values[78]	42	1			T511	7		T946	6		T947	2
values[79]	34	1			T511	4		T946	5		T947	2
values[80]	38	1			T511	4		T946	2		T947	2
values[81]	34	1			T511	3		T946	1		T947	2
values[82]	34	1			T511	5		T946	1		T947	2
values[83]	38	1			T511	5		T946	2		T947	2
values[84]	47	1			T511	8		T946	5		T947	2
values[85]	45	1			T511	6		T946	4		T947	2
values[86]	53	1			T511	9		T946	2		T947	2
values[87]	46	1			T511	5		T946	1		T947	2
values[88]	40	1			T511	1		T946	4		T947	2
values[89]	48	1			T511	5		T946	4		T947	4
values[90]	42	1			T511	2		T946	1		T947	4
values[91]	61	1			T511	4		T946	2		T947	11
values[92]	46	1			T511	1		T946	1		T947	4
values[93]	41	1			T511	2		T946	2		T947	4
values[94]	40	1			T511	3		T946	2		T947	7
values[95]	40	1			T511	3		T946	3		T947	3
values[96]	39	1			T511	6		T946	4		T947	2
values[97]	41	1			T511	4		T946	2		T947	2
values[98]	41	1			T511	3		T946	3		T947	4
values[99]	46	1			T511	1		T946	2		T947	9
values[100]	46	1			T511	3		T946	3		T947	4
values[101]	45	1			T511	4		T946	3		T947	5
values[102]	41	1			T511	5		T946	2		T947	3
values[103]	37	1			T511	3		T946	4		T947	2
values[104]	53	1			T511	4		T946	3		T947	2
values[105]	64	1			T511	4		T946	2		T947	3
values[106]	65	1			T511	2		T946	1		T947	3
values[107]	49	1			T511	1		T946	2		T947	4
values[108]	56	1			T511	5		T946	2		T947	3
values[109]	52	1			T511	7		T946	7		T947	2
values[110]	42	1			T511	3		T946	6		T947	2
values[111]	50	1			T511	6		T946	5		T947	6
values[112]	55	1			T511	2		T946	9		T947	5
values[113]	63	1			T511	4		T946	6		T947	4
values[114]	60	1			T511	1		T946	6		T947	2
values[115]	60	1			T511	9		T946	9		T947	2
values[116]	57	1			T511	4		T946	4		T947	2
values[117]	69	1			T511	8		T946	8		T947	3
values[118]	64	1			T511	15		T946	4		T947	4
values[119]	60	1			T511	10		T946	5		T947	2
values[120]	50	1			T511	7		T946	2		T947	3
values[121]	62	1			T511	4		T946	9		T947	2
values[122]	66	1			T511	7		T946	5		T947	5
values[123]	77	1			T511	5		T946	10		T947	4
values[124]	132	1			T511	14		T946	15		T947	7
values[125]	236	1			T511	31		T946	42		T947	3
values[126]	493	1			T511	35		T946	59		T947	22
values[127]	1820	1			T511	19		T946	29		T947	197
values[128]	3241	1			T511	1		T946	3		T947	473