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LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[18].q == 2'h2) ? 1'b0 : mio_out[18])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[18].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[19].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_out[19])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[19].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_out[19]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[19].q == 2'h2) ? 1'b0 : mio_out[19])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[19].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[20].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_out[20])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[20].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_out[20]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[20].q == 2'h2) ? 1'b0 : mio_out[20])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[20].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[21].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_out[21])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[21].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_out[21]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[21].q == 2'h2) ? 1'b0 : mio_out[21])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[21].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[22].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_out[22])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[22].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_out[22]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[22].q == 2'h2) ? 1'b0 : mio_out[22])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[22].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[23].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_out[23])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37,T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37,T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[23].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_out[23]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[23].q == 2'h2) ? 1'b0 : mio_out[23])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[23].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[24].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_out[24])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[24].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_out[24]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[24].q == 2'h2) ? 1'b0 : mio_out[24])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[24].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[25].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_out[25])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[25].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_out[25]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[25].q == 2'h2) ? 1'b0 : mio_out[25])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[25].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[26].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_out[26])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[26].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_out[26]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[26].q == 2'h2) ? 1'b0 : mio_out[26])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[26].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[27].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_out[27])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[27].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_out[27]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[27].q == 2'h2) ? 1'b0 : mio_out[27])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[27].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[28].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_out[28])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[28].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_out[28]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[28].q == 2'h2) ? 1'b0 : mio_out[28])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[28].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[29].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_out[29])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[29].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_out[29]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[29].q == 2'h2) ? 1'b0 : mio_out[29])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[29].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[30].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_out[30])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[30].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_out[30]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[30].q == 2'h2) ? 1'b0 : mio_out[30])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[30].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[31].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_out[31])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[31].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_out[31]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[31].q == 2'h2) ? 1'b0 : mio_out[31])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[31].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[32].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_out[32])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[32].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_out[32]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[32].q == 2'h2) ? 1'b0 : mio_out[32])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[32].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[33].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_out[33])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[33].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_out[33]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[33].q == 2'h2) ? 1'b0 : mio_out[33])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[33].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[34].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_out[34])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[34].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_out[34]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[34].q == 2'h2) ? 1'b0 : mio_out[34])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[34].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[35].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_out[35])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[35].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_out[35]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[35].q == 2'h2) ? 1'b0 : mio_out[35])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[35].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[36].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_out[36])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[36].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_out[36]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[36].q == 2'h2) ? 1'b0 : mio_out[36])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[36].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[37].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[37].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[37].q == 2'h2) ? 1'b0 : mio_out[37])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37,T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[37].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37,T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[37].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[37].q == 2'h2) ? 1'b0 : mio_out[37]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[37].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[37].q == 2'h2) ? 1'b0 : mio_out[37])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[37].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[38].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[38].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[38].q == 2'h2) ? 1'b0 : mio_out[38])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[38].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[38].q == 2'h2) ? 1'b0 : mio_out[38]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[38].q == 2'h2) ? 1'b0 : mio_out[38])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[38].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[39].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_out[39])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[39].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_out[39]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37,T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37,T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[39].q == 2'h2) ? 1'b0 : mio_out[39])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[39].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[40].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_out[40])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[40].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_out[40]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[40].q == 2'h2) ? 1'b0 : mio_out[40])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[40].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[41].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[41].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[41].q == 2'h2) ? 1'b0 : mio_out[41])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[41].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[41].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[41].q == 2'h2) ? 1'b0 : mio_out[41]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[41].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[41].q == 2'h2) ? 1'b0 : mio_out[41])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[41].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[42].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[42].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[42].q == 2'h2) ? 1'b0 : mio_out[42])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[42].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[42].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[42].q == 2'h2) ? 1'b0 : mio_out[42]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[42].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[42].q == 2'h2) ? 1'b0 : mio_out[42])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[42].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[43].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[43].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[43].q == 2'h2) ? 1'b0 : mio_out[43])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[43].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[43].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[43].q == 2'h2) ? 1'b0 : mio_out[43]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[43].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[43].q == 2'h2) ? 1'b0 : mio_out[43])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[43].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[44].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[44].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[44].q == 2'h2) ? 1'b0 : mio_out[44])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[44].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[44].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[44].q == 2'h2) ? 1'b0 : mio_out[44]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[44].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[44].q == 2'h2) ? 1'b0 : mio_out[44])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[44].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[45].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[45].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[45].q == 2'h2) ? 1'b0 : mio_out[45])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[45].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[45].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[45].q == 2'h2) ? 1'b0 : mio_out[45]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[45].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T37 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[45].q == 2'h2) ? 1'b0 : mio_out[45])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[45].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[46].q == 2'b0) ? 1'b0 : ((reg2hw.mio_pad_sleep_mode[46].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[46].q == 2'h2) ? 1'b0 : mio_out[46])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[46].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[46].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[46].q == 2'h2) ? 1'b0 : mio_out[46]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[46].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T38 |
LINE 492
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[46].q == 2'h2) ? 1'b0 : mio_out[46])
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 492
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[46].q == 2'h2)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[0].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[0].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[0].q == 2'h2) ? 1'b0 : mio_oe[0])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T36,T37 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[0].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T36,T37 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[0].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[0].q == 2'h2) ? 1'b0 : mio_oe[0]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T13,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[0].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T13,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[0].q == 2'h2) ? 1'b0 : mio_oe[0])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[0].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[1].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[1].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[1].q == 2'h2) ? 1'b0 : mio_oe[1])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[1].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[1].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[1].q == 2'h2) ? 1'b0 : mio_oe[1]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T37,T13 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[1].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T37,T13 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[1].q == 2'h2) ? 1'b0 : mio_oe[1])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[1].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[2].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[2].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[2].q == 2'h2) ? 1'b0 : mio_oe[2])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T13,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[2].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T13,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[2].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[2].q == 2'h2) ? 1'b0 : mio_oe[2]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T38,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[2].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T38,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[2].q == 2'h2) ? 1'b0 : mio_oe[2])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[2].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[3].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[3].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[3].q == 2'h2) ? 1'b0 : mio_oe[3])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T13,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[3].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T13,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[3].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[3].q == 2'h2) ? 1'b0 : mio_oe[3]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[3].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[3].q == 2'h2) ? 1'b0 : mio_oe[3])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[3].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[4].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[4].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[4].q == 2'h2) ? 1'b0 : mio_oe[4])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T13,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[4].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T13,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[4].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[4].q == 2'h2) ? 1'b0 : mio_oe[4]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[4].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[4].q == 2'h2) ? 1'b0 : mio_oe[4])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[4].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[5].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[5].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[5].q == 2'h2) ? 1'b0 : mio_oe[5])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T13,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[5].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T13,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[5].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[5].q == 2'h2) ? 1'b0 : mio_oe[5]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T38,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[5].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T38,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[5].q == 2'h2) ? 1'b0 : mio_oe[5])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[5].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[6].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[6].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[6].q == 2'h2) ? 1'b0 : mio_oe[6])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T13,T38,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[6].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T13,T38,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[6].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[6].q == 2'h2) ? 1'b0 : mio_oe[6]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T36,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[6].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T36,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[6].q == 2'h2) ? 1'b0 : mio_oe[6])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[6].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[7].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[7].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[7].q == 2'h2) ? 1'b0 : mio_oe[7])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T38,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[7].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T12,T38,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[7].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[7].q == 2'h2) ? 1'b0 : mio_oe[7]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T13,T14 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[7].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T13,T14 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[7].q == 2'h2) ? 1'b0 : mio_oe[7])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[7].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[8].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[8].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[8].q == 2'h2) ? 1'b0 : mio_oe[8])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[8].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[8].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[8].q == 2'h2) ? 1'b0 : mio_oe[8]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T38 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[8].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T38 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[8].q == 2'h2) ? 1'b0 : mio_oe[8])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[8].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[9].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[9].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[9].q == 2'h2) ? 1'b0 : mio_oe[9])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T38 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[9].q == 2'b0)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T37,T38 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[9].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[9].q == 2'h2) ? 1'b0 : mio_oe[9]))
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[9].q == 2'b1)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[9].q == 2'h2) ? 1'b0 : mio_oe[9])
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[9].q == 2'h2)
--------------------1-------------------
| -1- | Status | Tests |
|---|
| 0 | Not Covered | |
| 1 | Covered | T4,T5,T6 |
LINE 496
EXPRESSION
Number Term
1 (reg2hw.mio_pad_sleep_mode[10].q == 2'b0) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[10].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[10].q == 2'h2) ? 1'b0 : mio_oe[10])))
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T38 |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[10].q == 2'b0)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Covered | T36,T38 |
LINE 496
SUB-EXPRESSION ((reg2hw.mio_pad_sleep_mode[10].q == 2'b1) ? 1'b1 : ((reg2hw.mio_pad_sleep_mode[10].q == 2'h2) ? 1'b0 : mio_oe[10]))
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |
LINE 496
SUB-EXPRESSION (reg2hw.mio_pad_sleep_mode[10].q == 2'b1)
--------------------1--------------------
| -1- | Status | Tests |
|---|
| 0 | Covered | T4,T5,T6 |
| 1 | Not Covered | |