| SCORE |
LINE |
COND |
TOGGLE |
FSM |
BRANCH |
ASSERT |
GROUP |
|
| TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | TOTAL | INCR | NAME |
| 39.51 |
39.51 |
45.75 |
45.75 |
44.89 |
44.89 |
25.24 |
25.24 |
|
|
58.76 |
58.76 |
58.92 |
58.92 |
3.51 |
3.51 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.2728046189 |
| 48.51 |
9.00 |
45.95 |
0.19 |
45.10 |
0.21 |
29.06 |
3.83 |
|
|
58.80 |
0.04 |
59.09 |
0.17 |
53.07 |
49.56 |
/workspace/coverage/default/1.chip_sw_alert_test.537240937 |
| 54.25 |
5.74 |
56.45 |
10.51 |
50.86 |
5.76 |
33.95 |
4.89 |
|
|
61.85 |
3.05 |
62.06 |
2.97 |
60.31 |
7.24 |
/workspace/coverage/pad_ctrl_test_mode/4.chip_padctrl_attributes.200449827 |
| 59.63 |
5.38 |
68.41 |
11.96 |
58.87 |
8.01 |
35.53 |
1.59 |
|
|
72.56 |
10.71 |
62.06 |
0.00 |
60.31 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.2234053574 |
| 63.17 |
3.55 |
68.41 |
0.00 |
58.88 |
0.01 |
56.42 |
20.89 |
|
|
72.57 |
0.01 |
62.24 |
0.17 |
60.53 |
0.22 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.2976225252 |
| 66.47 |
3.30 |
73.75 |
5.33 |
65.38 |
6.51 |
56.68 |
0.26 |
|
|
79.55 |
6.98 |
62.94 |
0.70 |
60.53 |
0.00 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.1012736669 |
| 68.56 |
2.09 |
77.43 |
3.68 |
69.65 |
4.27 |
58.04 |
1.36 |
|
|
82.76 |
3.21 |
62.94 |
0.00 |
60.53 |
0.00 |
/workspace/coverage/default/2.chip_jtag_csr_rw.4149001136 |
| 70.42 |
1.86 |
78.74 |
1.31 |
70.57 |
0.92 |
61.98 |
3.94 |
|
|
83.92 |
1.15 |
63.29 |
0.35 |
64.04 |
3.51 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.2684474280 |
| 71.98 |
1.56 |
80.13 |
1.39 |
71.73 |
1.16 |
63.81 |
1.83 |
|
|
85.23 |
1.31 |
66.96 |
3.67 |
64.04 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1075473134 |
| 73.18 |
1.20 |
82.14 |
2.01 |
73.30 |
1.57 |
65.37 |
1.55 |
|
|
87.28 |
2.05 |
66.96 |
0.00 |
64.04 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.3565673074 |
| 74.34 |
1.16 |
82.23 |
0.09 |
73.32 |
0.02 |
72.05 |
6.68 |
|
|
87.29 |
0.01 |
67.13 |
0.17 |
64.04 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.4222456549 |
| 75.34 |
0.99 |
83.23 |
1.00 |
73.85 |
0.53 |
72.06 |
0.01 |
|
|
87.86 |
0.57 |
70.98 |
3.85 |
64.04 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.65931937 |
| 76.28 |
0.94 |
83.88 |
0.66 |
74.41 |
0.56 |
75.94 |
3.88 |
|
|
88.26 |
0.40 |
71.15 |
0.17 |
64.04 |
0.00 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.4235988223 |
| 76.96 |
0.68 |
83.88 |
0.00 |
74.41 |
0.00 |
80.05 |
4.11 |
|
|
88.26 |
0.00 |
71.15 |
0.00 |
64.04 |
0.00 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.3956738708 |
| 77.64 |
0.68 |
85.03 |
1.15 |
75.52 |
1.11 |
81.30 |
1.26 |
|
|
88.79 |
0.54 |
71.15 |
0.00 |
64.04 |
0.00 |
/workspace/coverage/default/0.chip_jtag_csr_rw.3290460845 |
| 78.29 |
0.65 |
85.57 |
0.54 |
76.10 |
0.58 |
81.47 |
0.17 |
|
|
89.30 |
0.51 |
73.25 |
2.10 |
64.04 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.118335231 |
| 78.90 |
0.61 |
85.57 |
0.00 |
76.10 |
0.00 |
82.26 |
0.79 |
|
|
89.30 |
0.00 |
73.25 |
0.00 |
66.89 |
2.85 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.3187679137 |
| 79.40 |
0.50 |
85.95 |
0.37 |
76.39 |
0.29 |
82.29 |
0.03 |
|
|
89.52 |
0.22 |
75.35 |
2.10 |
66.89 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.2749850477 |
| 79.88 |
0.48 |
86.23 |
0.28 |
76.66 |
0.26 |
82.29 |
0.00 |
|
|
89.74 |
0.22 |
77.45 |
2.10 |
66.89 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.1213052936 |
| 80.31 |
0.44 |
87.25 |
1.02 |
76.92 |
0.26 |
82.94 |
0.65 |
|
|
89.92 |
0.18 |
77.97 |
0.52 |
66.89 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.663936296 |
| 80.70 |
0.39 |
88.09 |
0.84 |
77.53 |
0.61 |
83.38 |
0.45 |
|
|
90.36 |
0.44 |
77.97 |
0.00 |
66.89 |
0.00 |
/workspace/coverage/default/0.chip_sw_gpio.2637072693 |
| 81.00 |
0.30 |
88.13 |
0.03 |
77.53 |
0.01 |
83.40 |
0.02 |
|
|
90.38 |
0.02 |
78.15 |
0.17 |
68.42 |
1.54 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.363317219 |
| 81.24 |
0.24 |
88.14 |
0.01 |
77.54 |
0.01 |
84.63 |
1.23 |
|
|
90.38 |
0.00 |
78.15 |
0.00 |
68.64 |
0.22 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.3513271849 |
| 81.48 |
0.24 |
88.30 |
0.16 |
77.67 |
0.13 |
85.20 |
0.57 |
|
|
90.55 |
0.17 |
78.32 |
0.17 |
68.86 |
0.22 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.1862767508 |
| 81.71 |
0.23 |
88.73 |
0.43 |
78.03 |
0.36 |
85.43 |
0.23 |
|
|
90.91 |
0.37 |
78.32 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.3165329895 |
| 81.91 |
0.19 |
88.83 |
0.11 |
78.11 |
0.08 |
85.46 |
0.03 |
|
|
90.98 |
0.07 |
79.20 |
0.87 |
68.86 |
0.00 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.1406549129 |
| 82.07 |
0.16 |
89.12 |
0.28 |
78.43 |
0.32 |
85.81 |
0.36 |
|
|
90.98 |
0.00 |
79.20 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1112399224 |
| 82.21 |
0.15 |
89.17 |
0.05 |
78.82 |
0.38 |
85.82 |
0.01 |
|
|
91.42 |
0.44 |
79.20 |
0.00 |
68.86 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.64473005 |
| 82.36 |
0.14 |
89.39 |
0.22 |
78.91 |
0.09 |
85.89 |
0.07 |
|
|
91.50 |
0.08 |
79.37 |
0.17 |
69.08 |
0.22 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.2164230998 |
| 82.47 |
0.11 |
89.47 |
0.08 |
78.94 |
0.03 |
86.08 |
0.18 |
|
|
91.53 |
0.02 |
79.72 |
0.35 |
69.08 |
0.00 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.339655862 |
| 82.57 |
0.10 |
89.51 |
0.04 |
79.18 |
0.24 |
86.14 |
0.07 |
|
|
91.63 |
0.10 |
79.90 |
0.17 |
69.08 |
0.00 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2348304781 |
| 82.67 |
0.10 |
89.53 |
0.02 |
79.19 |
0.01 |
86.71 |
0.57 |
|
|
91.63 |
0.00 |
79.90 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.330621963 |
| 82.75 |
0.08 |
89.54 |
0.01 |
79.41 |
0.23 |
86.71 |
0.00 |
|
|
91.89 |
0.26 |
79.90 |
0.00 |
69.08 |
0.00 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.473025265 |
| 82.84 |
0.08 |
89.57 |
0.02 |
79.46 |
0.04 |
86.71 |
0.00 |
|
|
91.92 |
0.03 |
80.07 |
0.17 |
69.30 |
0.22 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.4237097444 |
| 82.91 |
0.08 |
89.57 |
0.01 |
79.50 |
0.04 |
86.72 |
0.01 |
|
|
91.93 |
0.02 |
80.24 |
0.17 |
69.52 |
0.22 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.132459607 |
| 82.99 |
0.08 |
89.70 |
0.13 |
79.82 |
0.32 |
86.72 |
0.01 |
|
|
91.93 |
0.00 |
80.24 |
0.00 |
69.52 |
0.00 |
/workspace/coverage/default/1.chip_jtag_csr_rw.1321916909 |
| 83.06 |
0.07 |
89.70 |
0.01 |
79.83 |
0.01 |
86.73 |
0.01 |
|
|
91.94 |
0.01 |
80.42 |
0.17 |
69.74 |
0.22 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.3512472181 |
| 83.13 |
0.07 |
89.70 |
0.00 |
79.83 |
0.00 |
87.12 |
0.40 |
|
|
91.94 |
0.00 |
80.42 |
0.00 |
69.74 |
0.00 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.2818812578 |
| 83.18 |
0.06 |
89.74 |
0.03 |
79.85 |
0.02 |
87.18 |
0.05 |
|
|
91.95 |
0.01 |
80.42 |
0.00 |
69.96 |
0.22 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.491970701 |
| 83.23 |
0.05 |
89.74 |
0.00 |
79.85 |
0.00 |
87.48 |
0.30 |
|
|
91.95 |
0.00 |
80.42 |
0.00 |
69.96 |
0.00 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1411355399 |
| 83.28 |
0.05 |
89.74 |
0.00 |
79.85 |
0.00 |
87.78 |
0.29 |
|
|
91.95 |
0.00 |
80.42 |
0.00 |
69.96 |
0.00 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.3848219798 |
| 83.33 |
0.05 |
89.78 |
0.04 |
79.85 |
0.00 |
87.79 |
0.02 |
|
|
91.95 |
0.00 |
80.42 |
0.00 |
70.18 |
0.22 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.2845642773 |
| 83.37 |
0.05 |
89.78 |
0.00 |
79.85 |
0.00 |
88.07 |
0.28 |
|
|
91.95 |
0.00 |
80.42 |
0.00 |
70.18 |
0.00 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.1758303373 |
| 83.42 |
0.05 |
90.02 |
0.24 |
79.88 |
0.03 |
88.07 |
0.01 |
|
|
91.95 |
0.00 |
80.42 |
0.00 |
70.18 |
0.00 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.1891852053 |
| 83.46 |
0.04 |
90.03 |
0.01 |
79.88 |
0.01 |
88.09 |
0.02 |
|
|
91.95 |
0.00 |
80.42 |
0.00 |
70.39 |
0.22 |
/workspace/coverage/pad_ctrl_test_mode/0.chip_padctrl_attributes.2787575849 |
| 83.50 |
0.04 |
90.03 |
0.01 |
79.89 |
0.01 |
88.10 |
0.01 |
|
|
91.96 |
0.01 |
80.42 |
0.00 |
70.61 |
0.22 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.3151144428 |
| 83.54 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.12 |
0.02 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
70.83 |
0.22 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.2384920195 |
| 83.58 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.12 |
0.01 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
71.05 |
0.22 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.286471181 |
| 83.62 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.01 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
71.27 |
0.22 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.2358917852 |
| 83.65 |
0.04 |
90.03 |
0.00 |
79.89 |
0.01 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
71.49 |
0.22 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.3911944997 |
| 83.69 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
71.71 |
0.22 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2997344804 |
| 83.73 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
71.93 |
0.22 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.3464831748 |
| 83.76 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
72.15 |
0.22 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.2608504036 |
| 83.80 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
72.37 |
0.22 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.3168185174 |
| 83.84 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
72.59 |
0.22 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.1548188118 |
| 83.87 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
72.81 |
0.22 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.3267179328 |
| 83.91 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
73.03 |
0.22 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.1131756226 |
| 83.95 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
73.25 |
0.22 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.1901480897 |
| 83.98 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
73.46 |
0.22 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.3380901081 |
| 84.02 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
73.68 |
0.22 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.4008377974 |
| 84.06 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
73.90 |
0.22 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.1330486423 |
| 84.09 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
74.12 |
0.22 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.2113086690 |
| 84.13 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
74.34 |
0.22 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.3351892672 |
| 84.17 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
74.56 |
0.22 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.3376496323 |
| 84.20 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
74.78 |
0.22 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.2529972466 |
| 84.24 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
75.00 |
0.22 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.1860067165 |
| 84.28 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
75.22 |
0.22 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.2692901465 |
| 84.31 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
75.44 |
0.22 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.2926075210 |
| 84.35 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
75.66 |
0.22 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.293915698 |
| 84.39 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
75.88 |
0.22 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.2092880886 |
| 84.42 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
76.10 |
0.22 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.366265196 |
| 84.46 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
76.32 |
0.22 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.3459379761 |
| 84.50 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
76.54 |
0.22 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.1358155807 |
| 84.53 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
76.75 |
0.22 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.3635623027 |
| 84.57 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
76.97 |
0.22 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.1072630940 |
| 84.60 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
77.19 |
0.22 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.987957398 |
| 84.64 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
77.41 |
0.22 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.772444377 |
| 84.68 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
77.63 |
0.22 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.2595456275 |
| 84.71 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
77.85 |
0.22 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.3598415291 |
| 84.75 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
78.07 |
0.22 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.2690780400 |
| 84.79 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
78.29 |
0.22 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.3641742516 |
| 84.82 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
78.51 |
0.22 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.2710363070 |
| 84.86 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
78.73 |
0.22 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.1002334582 |
| 84.90 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
78.95 |
0.22 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.2396689117 |
| 84.93 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
79.17 |
0.22 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.402827661 |
| 84.97 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
79.39 |
0.22 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.772069387 |
| 85.01 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
79.61 |
0.22 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.358932714 |
| 85.04 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
79.82 |
0.22 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.327899031 |
| 85.08 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
80.04 |
0.22 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.2652527926 |
| 85.12 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
80.26 |
0.22 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.2546635394 |
| 85.15 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
80.48 |
0.22 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.2919245634 |
| 85.19 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
80.70 |
0.22 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.3783317923 |
| 85.23 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
80.92 |
0.22 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.3335720367 |
| 85.26 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
81.14 |
0.22 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.1869536537 |
| 85.30 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
81.36 |
0.22 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.2417423165 |
| 85.34 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
81.58 |
0.22 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.2101383953 |
| 85.37 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
81.80 |
0.22 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.334622939 |
| 85.41 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
82.02 |
0.22 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.3358773651 |
| 85.45 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
82.24 |
0.22 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.2537490523 |
| 85.48 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
82.46 |
0.22 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.3418722650 |
| 85.52 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
82.68 |
0.22 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.2887727384 |
| 85.55 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
82.89 |
0.22 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.147754154 |
| 85.59 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
83.11 |
0.22 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.2829468795 |
| 85.63 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
83.33 |
0.22 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.4173175435 |
| 85.66 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
83.55 |
0.22 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.2811127344 |
| 85.70 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
83.77 |
0.22 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.3783905183 |
| 85.74 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
83.99 |
0.22 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.2937782671 |
| 85.77 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
84.21 |
0.22 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.218958979 |
| 85.81 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
84.43 |
0.22 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.2718048753 |
| 85.85 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.13 |
0.00 |
|
|
91.96 |
0.00 |
80.42 |
0.00 |
84.65 |
0.22 |
/workspace/coverage/default/97.chip_sw_all_escalation_resets.3789552658 |
| 85.88 |
0.04 |
90.03 |
0.00 |
79.89 |
0.00 |
88.17 |
0.04 |
|
|
91.96 |
0.00 |
80.59 |
0.17 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.522880565 |
| 85.92 |
0.03 |
90.06 |
0.02 |
79.91 |
0.02 |
88.33 |
0.16 |
|
|
91.96 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_power_idle_load.3776072770 |
| 85.95 |
0.03 |
90.06 |
0.00 |
79.91 |
0.00 |
88.50 |
0.17 |
|
|
91.96 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.3566407008 |
| 85.97 |
0.03 |
90.06 |
0.00 |
80.08 |
0.17 |
88.50 |
0.00 |
|
|
91.96 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.3189936612 |
| 86.00 |
0.03 |
90.13 |
0.07 |
80.11 |
0.03 |
88.51 |
0.01 |
|
|
92.01 |
0.05 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.2225773827 |
| 86.03 |
0.03 |
90.13 |
0.00 |
80.11 |
0.00 |
88.67 |
0.15 |
|
|
92.01 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.1321023714 |
| 86.05 |
0.03 |
90.20 |
0.07 |
80.11 |
0.00 |
88.74 |
0.07 |
|
|
92.01 |
0.01 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.3457162466 |
| 86.07 |
0.02 |
90.20 |
0.00 |
80.11 |
0.00 |
88.84 |
0.11 |
|
|
92.01 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.651993880 |
| 86.09 |
0.02 |
90.20 |
0.00 |
80.11 |
0.00 |
88.94 |
0.10 |
|
|
92.01 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_dev.2541049541 |
| 86.10 |
0.02 |
90.20 |
0.00 |
80.11 |
0.00 |
89.05 |
0.10 |
|
|
92.01 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.2836564730 |
| 86.12 |
0.02 |
90.20 |
0.00 |
80.20 |
0.09 |
89.05 |
0.00 |
|
|
92.01 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.1399861764 |
| 86.13 |
0.01 |
90.20 |
0.00 |
80.20 |
0.00 |
89.13 |
0.09 |
|
|
92.01 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.3671295428 |
| 86.15 |
0.01 |
90.20 |
0.01 |
80.23 |
0.02 |
89.18 |
0.04 |
|
|
92.02 |
0.01 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.2461649070 |
| 86.16 |
0.01 |
90.27 |
0.07 |
80.23 |
0.01 |
89.18 |
0.00 |
|
|
92.02 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.1404917588 |
| 86.17 |
0.01 |
90.27 |
0.00 |
80.31 |
0.07 |
89.18 |
0.00 |
|
|
92.02 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.4068548709 |
| 86.18 |
0.01 |
90.30 |
0.02 |
80.32 |
0.02 |
89.18 |
0.01 |
|
|
92.05 |
0.02 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.1978810847 |
| 86.19 |
0.01 |
90.30 |
0.00 |
80.36 |
0.04 |
89.18 |
0.00 |
|
|
92.08 |
0.03 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.2882716820 |
| 86.20 |
0.01 |
90.30 |
0.00 |
80.36 |
0.00 |
89.25 |
0.07 |
|
|
92.08 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.1169068722 |
| 86.21 |
0.01 |
90.33 |
0.03 |
80.37 |
0.01 |
89.25 |
0.00 |
|
|
92.10 |
0.02 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.1896898806 |
| 86.22 |
0.01 |
90.33 |
0.01 |
80.39 |
0.02 |
89.28 |
0.03 |
|
|
92.10 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.4066237491 |
| 86.23 |
0.01 |
90.36 |
0.02 |
80.40 |
0.01 |
89.28 |
0.01 |
|
|
92.11 |
0.02 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.4207543763 |
| 86.24 |
0.01 |
90.37 |
0.01 |
80.43 |
0.03 |
89.29 |
0.01 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.3338211958 |
| 86.25 |
0.01 |
90.37 |
0.00 |
80.48 |
0.05 |
89.29 |
0.00 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.3310964633 |
| 86.25 |
0.01 |
90.37 |
0.00 |
80.48 |
0.00 |
89.33 |
0.04 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.1149393720 |
| 86.26 |
0.01 |
90.37 |
0.00 |
80.48 |
0.00 |
89.37 |
0.04 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_sw_ast_clk_rst_inputs.711324220 |
| 86.27 |
0.01 |
90.40 |
0.03 |
80.48 |
0.01 |
89.37 |
0.00 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.2797419534 |
| 86.27 |
0.01 |
90.40 |
0.01 |
80.49 |
0.01 |
89.39 |
0.02 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.2611857761 |
| 86.28 |
0.01 |
90.40 |
0.00 |
80.49 |
0.00 |
89.43 |
0.03 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.1039856610 |
| 86.28 |
0.01 |
90.40 |
0.00 |
80.49 |
0.00 |
89.45 |
0.03 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.834155184 |
| 86.29 |
0.01 |
90.40 |
0.00 |
80.49 |
0.00 |
89.48 |
0.02 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.988083379 |
| 86.29 |
0.01 |
90.40 |
0.00 |
80.49 |
0.00 |
89.50 |
0.02 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.360468655 |
| 86.30 |
0.01 |
90.41 |
0.01 |
80.50 |
0.01 |
89.51 |
0.01 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.921483893 |
| 86.30 |
0.01 |
90.41 |
0.00 |
80.53 |
0.02 |
89.51 |
0.00 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.745451600 |
| 86.30 |
0.01 |
90.41 |
0.01 |
80.53 |
0.01 |
89.51 |
0.01 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.429632482 |
| 86.30 |
0.01 |
90.41 |
0.00 |
80.55 |
0.02 |
89.51 |
0.00 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.2455586025 |
| 86.31 |
0.01 |
90.41 |
0.00 |
80.57 |
0.02 |
89.51 |
0.00 |
|
|
92.11 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.546890483 |
| 86.31 |
0.01 |
90.41 |
0.00 |
80.57 |
0.00 |
89.52 |
0.01 |
|
|
92.12 |
0.01 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.1047722550 |
| 86.31 |
0.01 |
90.41 |
0.00 |
80.58 |
0.01 |
89.52 |
0.00 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.1865006746 |
| 86.32 |
0.01 |
90.41 |
0.00 |
80.58 |
0.00 |
89.53 |
0.01 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_jtag_mem_access.349220838 |
| 86.32 |
0.01 |
90.42 |
0.01 |
80.58 |
0.00 |
89.54 |
0.01 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.113880480 |
| 86.32 |
0.01 |
90.42 |
0.00 |
80.58 |
0.00 |
89.55 |
0.01 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.435121990 |
| 86.32 |
0.01 |
90.42 |
0.01 |
80.59 |
0.01 |
89.56 |
0.01 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.1797541957 |
| 86.32 |
0.01 |
90.43 |
0.01 |
80.59 |
0.00 |
89.56 |
0.01 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.285510744 |
| 86.33 |
0.01 |
90.44 |
0.01 |
80.59 |
0.00 |
89.57 |
0.01 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.1373621355 |
| 86.33 |
0.01 |
90.44 |
0.00 |
80.60 |
0.01 |
89.57 |
0.00 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1704280016 |
| 86.33 |
0.01 |
90.44 |
0.00 |
80.61 |
0.01 |
89.57 |
0.00 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3941415096 |
| 86.33 |
0.01 |
90.44 |
0.00 |
80.61 |
0.00 |
89.58 |
0.01 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.979977673 |
| 86.33 |
0.01 |
90.44 |
0.00 |
80.61 |
0.00 |
89.58 |
0.01 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.3463277212 |
| 86.33 |
0.01 |
90.44 |
0.00 |
80.61 |
0.00 |
89.59 |
0.01 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.2934948058 |
| 86.34 |
0.01 |
90.44 |
0.00 |
80.61 |
0.01 |
89.60 |
0.01 |
|
|
92.12 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.929456889 |
| 86.34 |
0.01 |
90.44 |
0.00 |
80.61 |
0.00 |
89.60 |
0.00 |
|
|
92.13 |
0.01 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/4.chip_tap_straps_dev.3558815318 |
| 86.34 |
0.01 |
90.44 |
0.00 |
80.62 |
0.01 |
89.60 |
0.00 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.3556531712 |
| 86.34 |
0.01 |
90.44 |
0.00 |
80.62 |
0.00 |
89.61 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.4213806934 |
| 86.34 |
0.01 |
90.44 |
0.00 |
80.62 |
0.00 |
89.61 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.3040986757 |
| 86.34 |
0.01 |
90.44 |
0.00 |
80.62 |
0.00 |
89.62 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.3116804603 |
| 86.34 |
0.01 |
90.44 |
0.00 |
80.62 |
0.00 |
89.62 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.792815172 |
| 86.34 |
0.01 |
90.44 |
0.00 |
80.62 |
0.00 |
89.63 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.3067110338 |
| 86.34 |
0.01 |
90.44 |
0.00 |
80.62 |
0.00 |
89.63 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2243381566 |
| 86.34 |
0.01 |
90.44 |
0.00 |
80.62 |
0.00 |
89.64 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.3834911078 |
| 86.34 |
0.01 |
90.44 |
0.00 |
80.62 |
0.01 |
89.64 |
0.00 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.1207196267 |
| 86.35 |
0.01 |
90.44 |
0.00 |
80.62 |
0.01 |
89.64 |
0.00 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.3052513447 |
| 86.35 |
0.01 |
90.44 |
0.00 |
80.63 |
0.01 |
89.64 |
0.00 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/2.chip_sw_gpio.2660752716 |
| 86.35 |
0.01 |
90.44 |
0.00 |
80.63 |
0.00 |
89.64 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.2277915489 |
| 86.35 |
0.01 |
90.44 |
0.00 |
80.63 |
0.00 |
89.64 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.47783613 |
| 86.35 |
0.01 |
90.44 |
0.00 |
80.63 |
0.00 |
89.65 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.3463593087 |
| 86.35 |
0.01 |
90.44 |
0.00 |
80.63 |
0.00 |
89.65 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.2478661752 |
| 86.35 |
0.01 |
90.44 |
0.00 |
80.63 |
0.00 |
89.65 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.1374344697 |
| 86.35 |
0.01 |
90.44 |
0.00 |
80.63 |
0.00 |
89.65 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.89192608 |
| 86.35 |
0.01 |
90.44 |
0.00 |
80.63 |
0.00 |
89.66 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.4143558074 |
| 86.35 |
0.01 |
90.44 |
0.00 |
80.63 |
0.00 |
89.66 |
0.01 |
|
|
92.13 |
0.00 |
80.59 |
0.00 |
84.65 |
0.00 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.1689805637 |
| Name |
| /workspace/coverage/default/0.chip_sival_flash_info_access.3965050275 |
| /workspace/coverage/default/0.chip_sw_aes_enc.97604710 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.2795279484 |
| /workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.220644505 |
| /workspace/coverage/default/0.chip_sw_aes_entropy.3898376377 |
| /workspace/coverage/default/0.chip_sw_aes_idle.1590264753 |
| /workspace/coverage/default/0.chip_sw_aes_masking_off.2279963692 |
| /workspace/coverage/default/0.chip_sw_aes_smoketest.1223551971 |
| /workspace/coverage/default/0.chip_sw_alert_handler_entropy.2268869737 |
| /workspace/coverage/default/0.chip_sw_alert_handler_escalation.3751729184 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.691417885 |
| /workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.4119379017 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.1519038462 |
| /workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.893719887 |
| /workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.454126651 |
| /workspace/coverage/default/0.chip_sw_alert_test.3185470369 |
| /workspace/coverage/default/0.chip_sw_aon_timer_irq.2898546503 |
| /workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.3427245282 |
| /workspace/coverage/default/0.chip_sw_aon_timer_smoketest.882036527 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.2903584911 |
| /workspace/coverage/default/0.chip_sw_aon_timer_wdog_lc_escalate.3028498586 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.4018355121 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.707230724 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1315874408 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.2743587877 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3769508875 |
| /workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.4184632085 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter.3592502820 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.3836179602 |
| /workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.3794601239 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.900882486 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.1388992254 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.165551977 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.3652247695 |
| /workspace/coverage/default/0.chip_sw_clkmgr_off_peri.3035114811 |
| /workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.895480765 |
| /workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.38385689 |
| /workspace/coverage/default/0.chip_sw_clkmgr_smoketest.4281941243 |
| /workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.1623105451 |
| /workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.3484737219 |
| /workspace/coverage/default/0.chip_sw_csrng_kat_test.2653690937 |
| /workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.2179470457 |
| /workspace/coverage/default/0.chip_sw_csrng_smoketest.358653968 |
| /workspace/coverage/default/0.chip_sw_data_integrity_escalation.2637876083 |
| /workspace/coverage/default/0.chip_sw_edn_auto_mode.3411877059 |
| /workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.2280713668 |
| /workspace/coverage/default/0.chip_sw_edn_kat.2619020099 |
| /workspace/coverage/default/0.chip_sw_edn_sw_mode.1500518589 |
| /workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.3221444636 |
| /workspace/coverage/default/0.chip_sw_entropy_src_csrng.2664024552 |
| /workspace/coverage/default/0.chip_sw_entropy_src_kat_test.4037449388 |
| /workspace/coverage/default/0.chip_sw_entropy_src_smoketest.117880057 |
| /workspace/coverage/default/0.chip_sw_example_concurrency.1323536789 |
| /workspace/coverage/default/0.chip_sw_example_flash.443287996 |
| /workspace/coverage/default/0.chip_sw_example_manufacturer.2356920729 |
| /workspace/coverage/default/0.chip_sw_example_rom.857262796 |
| /workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.3232384187 |
| /workspace/coverage/default/0.chip_sw_flash_crash_alert.1212801289 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access.2173486183 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.3377515989 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3639947163 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_clock_freqs.2870070253 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.2967537737 |
| /workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.959226421 |
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| /workspace/coverage/default/8.chip_sw_uart_rand_baudrate.369429004 |
| /workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.1097498993 |
| /workspace/coverage/default/80.chip_sw_all_escalation_resets.3806599844 |
| /workspace/coverage/default/81.chip_sw_all_escalation_resets.7571107 |
| /workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.1908908697 |
| /workspace/coverage/default/82.chip_sw_all_escalation_resets.3497003366 |
| /workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.1126695690 |
| /workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.1630704481 |
| /workspace/coverage/default/84.chip_sw_all_escalation_resets.915635929 |
| /workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.3280591075 |
| /workspace/coverage/default/86.chip_sw_all_escalation_resets.372547658 |
| /workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.230182426 |
| /workspace/coverage/default/87.chip_sw_all_escalation_resets.359350181 |
| /workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.3028709314 |
| /workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.2137430877 |
| /workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.2121451923 |
| /workspace/coverage/default/9.chip_sw_all_escalation_resets.3268290101 |
| /workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.2676871715 |
| /workspace/coverage/default/9.chip_sw_lc_ctrl_transition.2965105489 |
| /workspace/coverage/default/9.chip_sw_uart_rand_baudrate.1018583279 |
| /workspace/coverage/default/90.chip_sw_all_escalation_resets.419336183 |
| /workspace/coverage/default/91.chip_sw_all_escalation_resets.2747087568 |
| /workspace/coverage/default/93.chip_sw_all_escalation_resets.1532041185 |
| /workspace/coverage/default/94.chip_sw_all_escalation_resets.1197271083 |
| /workspace/coverage/default/95.chip_sw_all_escalation_resets.3150134221 |
| /workspace/coverage/default/98.chip_sw_all_escalation_resets.4088655025 |
| /workspace/coverage/default/99.chip_sw_all_escalation_resets.2516631597 |
| /workspace/coverage/pad_ctrl_test_mode/1.chip_padctrl_attributes.21299103 |
| /workspace/coverage/pad_ctrl_test_mode/2.chip_padctrl_attributes.3813146683 |
| /workspace/coverage/pad_ctrl_test_mode/3.chip_padctrl_attributes.666000802 |
| /workspace/coverage/pad_ctrl_test_mode/5.chip_padctrl_attributes.3354547190 |
| /workspace/coverage/pad_ctrl_test_mode/6.chip_padctrl_attributes.411659365 |
| /workspace/coverage/pad_ctrl_test_mode/7.chip_padctrl_attributes.2709385384 |
| /workspace/coverage/pad_ctrl_test_mode/8.chip_padctrl_attributes.1899500901 |
| /workspace/coverage/pad_ctrl_test_mode/9.chip_padctrl_attributes.4027666715 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T4 |
/workspace/coverage/default/2.rom_e2e_static_critical.1864716746 |
|
|
Jun 09 03:43:31 PM PDT 24 |
Jun 09 04:37:31 PM PDT 24 |
15716683310 ps |
| T5 |
/workspace/coverage/default/1.rom_e2e_smoke.1522831419 |
|
|
Jun 09 03:33:05 PM PDT 24 |
Jun 09 04:34:38 PM PDT 24 |
14545538550 ps |
| T6 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.2976225252 |
|
|
Jun 09 03:11:25 PM PDT 24 |
Jun 09 03:49:53 PM PDT 24 |
10821574648 ps |
| T30 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.2790005428 |
|
|
Jun 09 03:29:06 PM PDT 24 |
Jun 09 03:45:06 PM PDT 24 |
4546676290 ps |
| T58 |
/workspace/coverage/default/2.chip_sw_hmac_oneshot.339051995 |
|
|
Jun 09 03:35:08 PM PDT 24 |
Jun 09 03:41:49 PM PDT 24 |
3345640434 ps |
| T95 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1411355399 |
|
|
Jun 09 03:26:38 PM PDT 24 |
Jun 09 03:31:56 PM PDT 24 |
2947712850 ps |
| T96 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.1557127510 |
|
|
Jun 09 03:34:54 PM PDT 24 |
Jun 09 03:40:26 PM PDT 24 |
2799902346 ps |
| T17 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access.3234801199 |
|
|
Jun 09 03:24:05 PM PDT 24 |
Jun 09 03:37:26 PM PDT 24 |
5348555950 ps |
| T31 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.2728046189 |
|
|
Jun 09 03:47:35 PM PDT 24 |
Jun 09 03:54:40 PM PDT 24 |
4125973720 ps |
| T93 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.138198770 |
|
|
Jun 09 03:34:35 PM PDT 24 |
Jun 09 04:00:08 PM PDT 24 |
6727936976 ps |
| T32 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.4066237491 |
|
|
Jun 09 03:18:08 PM PDT 24 |
Jun 09 03:27:15 PM PDT 24 |
4651224848 ps |
| T18 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.3915758704 |
|
|
Jun 09 03:18:28 PM PDT 24 |
Jun 09 03:41:45 PM PDT 24 |
8827128116 ps |
| T19 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.2684474280 |
|
|
Jun 09 03:12:20 PM PDT 24 |
Jun 09 03:25:48 PM PDT 24 |
4735754304 ps |
| T27 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.1245787598 |
|
|
Jun 09 03:33:40 PM PDT 24 |
Jun 09 03:41:22 PM PDT 24 |
3358439025 ps |
| T45 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.339655862 |
|
|
Jun 09 03:31:45 PM PDT 24 |
Jun 09 04:00:05 PM PDT 24 |
22700921760 ps |
| T111 |
/workspace/coverage/default/1.rom_keymgr_functest.3800436678 |
|
|
Jun 09 03:29:28 PM PDT 24 |
Jun 09 03:37:11 PM PDT 24 |
4909788830 ps |
| T1 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1075473134 |
|
|
Jun 09 03:13:51 PM PDT 24 |
Jun 09 03:43:05 PM PDT 24 |
21356697338 ps |
| T143 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.2795737436 |
|
|
Jun 09 03:31:59 PM PDT 24 |
Jun 09 03:39:06 PM PDT 24 |
3122161688 ps |
| T144 |
/workspace/coverage/default/0.chip_sival_flash_info_access.3965050275 |
|
|
Jun 09 03:12:08 PM PDT 24 |
Jun 09 03:18:59 PM PDT 24 |
3024859576 ps |
| T28 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.2358917852 |
|
|
Jun 09 03:50:42 PM PDT 24 |
Jun 09 03:57:04 PM PDT 24 |
3498281906 ps |
| T99 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.3513271849 |
|
|
Jun 09 03:33:13 PM PDT 24 |
Jun 09 03:57:03 PM PDT 24 |
7009874056 ps |
| T145 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.3357371119 |
|
|
Jun 09 03:46:06 PM PDT 24 |
Jun 09 03:51:18 PM PDT 24 |
3313640750 ps |
| T146 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.2384920195 |
|
|
Jun 09 03:45:53 PM PDT 24 |
Jun 09 03:53:38 PM PDT 24 |
4093579662 ps |
| T86 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.286471181 |
|
|
Jun 09 03:47:15 PM PDT 24 |
Jun 09 03:58:33 PM PDT 24 |
5588839388 ps |
| T71 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.1533734009 |
|
|
Jun 09 03:30:05 PM PDT 24 |
Jun 09 03:32:10 PM PDT 24 |
1956937077 ps |
| T33 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.4235988223 |
|
|
Jun 09 03:20:17 PM PDT 24 |
Jun 09 04:27:01 PM PDT 24 |
13739471000 ps |
| T308 |
/workspace/coverage/default/2.chip_sw_example_flash.3275069260 |
|
|
Jun 09 03:28:20 PM PDT 24 |
Jun 09 03:32:50 PM PDT 24 |
2493129492 ps |
| T94 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.913887750 |
|
|
Jun 09 03:41:08 PM PDT 24 |
Jun 09 03:45:58 PM PDT 24 |
2729121615 ps |
| T329 |
/workspace/coverage/default/1.chip_sw_example_rom.2272734528 |
|
|
Jun 09 03:15:08 PM PDT 24 |
Jun 09 03:17:10 PM PDT 24 |
2595045888 ps |
| T29 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.3187679137 |
|
|
Jun 09 03:11:46 PM PDT 24 |
Jun 09 03:35:55 PM PDT 24 |
13910445240 ps |
| T342 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.2838347986 |
|
|
Jun 09 03:43:30 PM PDT 24 |
Jun 09 03:49:46 PM PDT 24 |
3092779864 ps |
| T87 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.2275976561 |
|
|
Jun 09 03:22:59 PM PDT 24 |
Jun 09 03:27:39 PM PDT 24 |
3032609000 ps |
| T42 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1217652044 |
|
|
Jun 09 03:16:53 PM PDT 24 |
Jun 09 03:24:26 PM PDT 24 |
4672447200 ps |
| T77 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.2845642773 |
|
|
Jun 09 03:45:33 PM PDT 24 |
Jun 09 03:56:50 PM PDT 24 |
6014751448 ps |
| T529 |
/workspace/coverage/default/1.chip_sw_rstmgr_smoketest.447112070 |
|
|
Jun 09 03:28:29 PM PDT 24 |
Jun 09 03:32:21 PM PDT 24 |
2748457316 ps |
| T462 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.2835778916 |
|
|
Jun 09 03:27:45 PM PDT 24 |
Jun 09 03:52:27 PM PDT 24 |
5037769248 ps |
| T34 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.1039856610 |
|
|
Jun 09 03:16:14 PM PDT 24 |
Jun 09 03:25:12 PM PDT 24 |
4694601650 ps |
| T260 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.2532578947 |
|
|
Jun 09 03:14:21 PM PDT 24 |
Jun 09 03:27:35 PM PDT 24 |
5699624576 ps |
| T73 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.3315748558 |
|
|
Jun 09 03:47:13 PM PDT 24 |
Jun 09 03:59:58 PM PDT 24 |
5164787892 ps |
| T74 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.3150134221 |
|
|
Jun 09 03:50:03 PM PDT 24 |
Jun 09 03:59:31 PM PDT 24 |
5138842804 ps |
| T75 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.3599466476 |
|
|
Jun 09 03:43:18 PM PDT 24 |
Jun 09 03:54:19 PM PDT 24 |
4366575258 ps |
| T35 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.1720501100 |
|
|
Jun 09 03:30:41 PM PDT 24 |
Jun 09 03:41:03 PM PDT 24 |
7009049128 ps |
| T313 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.2164230998 |
|
|
Jun 09 03:43:12 PM PDT 24 |
Jun 09 03:54:39 PM PDT 24 |
5176437830 ps |
| T186 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.2011746154 |
|
|
Jun 09 03:47:47 PM PDT 24 |
Jun 09 03:57:33 PM PDT 24 |
4840289446 ps |
| T98 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.288690235 |
|
|
Jun 09 03:30:56 PM PDT 24 |
Jun 09 03:36:13 PM PDT 24 |
2812103304 ps |
| T339 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.895480765 |
|
|
Jun 09 03:14:57 PM PDT 24 |
Jun 09 03:24:27 PM PDT 24 |
3861779136 ps |
| T244 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.1689805637 |
|
|
Jun 09 03:12:10 PM PDT 24 |
Jun 09 03:15:25 PM PDT 24 |
2230202338 ps |
| T150 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.2885383522 |
|
|
Jun 09 03:37:16 PM PDT 24 |
Jun 09 03:49:48 PM PDT 24 |
5097458791 ps |
| T347 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.1358030738 |
|
|
Jun 09 03:47:25 PM PDT 24 |
Jun 09 03:57:50 PM PDT 24 |
5679696552 ps |
| T181 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.2121451923 |
|
|
Jun 09 03:41:37 PM PDT 24 |
Jun 09 03:48:25 PM PDT 24 |
3652459320 ps |
| T107 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.4091558444 |
|
|
Jun 09 03:31:48 PM PDT 24 |
Jun 09 04:39:06 PM PDT 24 |
18751091972 ps |
| T257 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.3274020643 |
|
|
Jun 09 03:30:39 PM PDT 24 |
Jun 09 03:35:30 PM PDT 24 |
2877007796 ps |
| T174 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.378296768 |
|
|
Jun 09 03:32:20 PM PDT 24 |
Jun 09 04:27:38 PM PDT 24 |
17300227060 ps |
| T43 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.3923820485 |
|
|
Jun 09 03:45:24 PM PDT 24 |
Jun 09 03:52:19 PM PDT 24 |
4098997920 ps |
| T100 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.3956738708 |
|
|
Jun 09 03:34:22 PM PDT 24 |
Jun 09 03:56:43 PM PDT 24 |
7854057280 ps |
| T240 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.2201471196 |
|
|
Jun 09 03:47:17 PM PDT 24 |
Jun 09 03:52:44 PM PDT 24 |
3008435924 ps |
| T112 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.3331538276 |
|
|
Jun 09 03:29:14 PM PDT 24 |
Jun 09 03:37:30 PM PDT 24 |
5518701617 ps |
| T88 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.1999370960 |
|
|
Jun 09 03:30:04 PM PDT 24 |
Jun 09 03:33:08 PM PDT 24 |
2093381184 ps |
| T530 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.959226421 |
|
|
Jun 09 03:15:46 PM PDT 24 |
Jun 09 03:35:47 PM PDT 24 |
5983371910 ps |
| T459 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2997344804 |
|
|
Jun 09 03:14:43 PM PDT 24 |
Jun 09 03:21:14 PM PDT 24 |
4378912696 ps |
| T456 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.1796264285 |
|
|
Jun 09 03:46:51 PM PDT 24 |
Jun 09 03:52:32 PM PDT 24 |
4333633512 ps |
| T101 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.127183346 |
|
|
Jun 09 03:28:18 PM PDT 24 |
Jun 09 03:53:20 PM PDT 24 |
6362882238 ps |
| T321 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.1029654665 |
|
|
Jun 09 03:44:15 PM PDT 24 |
Jun 09 03:53:30 PM PDT 24 |
4365235064 ps |
| T44 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.1620901552 |
|
|
Jun 09 03:28:57 PM PDT 24 |
Jun 09 03:35:49 PM PDT 24 |
4781028346 ps |
| T344 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.2690780400 |
|
|
Jun 09 03:45:46 PM PDT 24 |
Jun 09 03:59:28 PM PDT 24 |
5388028536 ps |
| T333 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.293915698 |
|
|
Jun 09 03:30:04 PM PDT 24 |
Jun 09 03:40:05 PM PDT 24 |
5818281752 ps |
| T323 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.1897763136 |
|
|
Jun 09 03:48:26 PM PDT 24 |
Jun 09 03:58:52 PM PDT 24 |
6044340136 ps |
| T261 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.655030902 |
|
|
Jun 09 03:21:35 PM PDT 24 |
Jun 09 03:32:17 PM PDT 24 |
8747120150 ps |
| T105 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.1223551971 |
|
|
Jun 09 03:15:59 PM PDT 24 |
Jun 09 03:19:08 PM PDT 24 |
3009250416 ps |
| T531 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.3519503926 |
|
|
Jun 09 03:16:14 PM PDT 24 |
Jun 09 03:18:44 PM PDT 24 |
2376392004 ps |
| T370 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.523200838 |
|
|
Jun 09 03:12:04 PM PDT 24 |
Jun 09 03:24:25 PM PDT 24 |
4507224984 ps |
| T258 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.2685055073 |
|
|
Jun 09 03:16:13 PM PDT 24 |
Jun 09 03:21:08 PM PDT 24 |
3389746556 ps |
| T22 |
/workspace/coverage/default/0.chip_jtag_mem_access.349220838 |
|
|
Jun 09 03:04:25 PM PDT 24 |
Jun 09 03:27:52 PM PDT 24 |
14065553752 ps |
| T322 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.369429004 |
|
|
Jun 09 03:41:00 PM PDT 24 |
Jun 09 03:49:27 PM PDT 24 |
3885037644 ps |
| T127 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.3512472181 |
|
|
Jun 09 03:51:30 PM PDT 24 |
Jun 09 04:02:03 PM PDT 24 |
6377404024 ps |
| T72 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.651993880 |
|
|
Jun 09 03:12:34 PM PDT 24 |
Jun 09 03:21:56 PM PDT 24 |
4839088792 ps |
| T23 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.1862767508 |
|
|
Jun 09 03:29:14 PM PDT 24 |
Jun 09 06:14:13 PM PDT 24 |
57531886528 ps |
| T136 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.328080984 |
|
|
Jun 09 03:26:38 PM PDT 24 |
Jun 09 03:29:44 PM PDT 24 |
2739313247 ps |
| T137 |
/workspace/coverage/default/2.rom_e2e_smoke.933778657 |
|
|
Jun 09 03:40:25 PM PDT 24 |
Jun 09 04:36:29 PM PDT 24 |
14494342376 ps |
| T138 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.3376496323 |
|
|
Jun 09 03:44:38 PM PDT 24 |
Jun 09 03:52:12 PM PDT 24 |
4108560674 ps |
| T70 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.2504842137 |
|
|
Jun 09 03:31:12 PM PDT 24 |
Jun 09 03:33:50 PM PDT 24 |
3688872492 ps |
| T139 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.2135131414 |
|
|
Jun 09 03:16:36 PM PDT 24 |
Jun 09 03:21:04 PM PDT 24 |
2819681048 ps |
| T140 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.1901480897 |
|
|
Jun 09 03:43:49 PM PDT 24 |
Jun 09 03:51:29 PM PDT 24 |
3881380128 ps |
| T123 |
/workspace/coverage/default/3.chip_tap_straps_dev.2092529107 |
|
|
Jun 09 03:39:14 PM PDT 24 |
Jun 09 04:06:50 PM PDT 24 |
14590638073 ps |
| T348 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.1848601622 |
|
|
Jun 09 03:40:51 PM PDT 24 |
Jun 09 03:54:01 PM PDT 24 |
6107539560 ps |
| T367 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.480777596 |
|
|
Jun 09 03:49:25 PM PDT 24 |
Jun 09 03:59:02 PM PDT 24 |
5968189704 ps |
| T532 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.554163527 |
|
|
Jun 09 03:12:08 PM PDT 24 |
Jun 09 03:18:43 PM PDT 24 |
3118193252 ps |
| T113 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.4099730650 |
|
|
Jun 09 03:26:46 PM PDT 24 |
Jun 09 03:35:52 PM PDT 24 |
4481341535 ps |
| T151 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1023967359 |
|
|
Jun 09 03:36:19 PM PDT 24 |
Jun 09 03:46:34 PM PDT 24 |
4303340474 ps |
| T533 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.1165026457 |
|
|
Jun 09 03:12:29 PM PDT 24 |
Jun 09 04:56:08 PM PDT 24 |
26444295378 ps |
| T534 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.2510084593 |
|
|
Jun 09 03:42:10 PM PDT 24 |
Jun 09 03:48:00 PM PDT 24 |
3260004160 ps |
| T114 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.3443602695 |
|
|
Jun 09 03:35:23 PM PDT 24 |
Jun 09 03:46:55 PM PDT 24 |
3985762015 ps |
| T535 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.732411615 |
|
|
Jun 09 03:37:15 PM PDT 24 |
Jun 09 03:46:37 PM PDT 24 |
5752106728 ps |
| T349 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.2698083973 |
|
|
Jun 09 03:47:52 PM PDT 24 |
Jun 09 04:03:40 PM PDT 24 |
5347212300 ps |
| T203 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.562629667 |
|
|
Jun 09 03:21:36 PM PDT 24 |
Jun 09 03:30:17 PM PDT 24 |
3348727266 ps |
| T106 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.1337077929 |
|
|
Jun 09 03:32:55 PM PDT 24 |
Jun 09 03:37:33 PM PDT 24 |
2624455015 ps |
| T92 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.3565673074 |
|
|
Jun 09 03:16:55 PM PDT 24 |
Jun 09 03:30:35 PM PDT 24 |
4852740274 ps |
| T81 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.3035221998 |
|
|
Jun 09 03:47:25 PM PDT 24 |
Jun 09 03:59:28 PM PDT 24 |
5476201928 ps |
| T334 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3344698729 |
|
|
Jun 09 03:14:59 PM PDT 24 |
Jun 09 03:42:00 PM PDT 24 |
16118882434 ps |
| T536 |
/workspace/coverage/default/1.chip_sw_example_flash.638197275 |
|
|
Jun 09 03:17:18 PM PDT 24 |
Jun 09 03:21:20 PM PDT 24 |
2631198106 ps |
| T381 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.2973391715 |
|
|
Jun 09 03:46:47 PM PDT 24 |
Jun 09 03:59:22 PM PDT 24 |
5089173134 ps |
| T128 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.667967623 |
|
|
Jun 09 03:33:17 PM PDT 24 |
Jun 09 03:56:20 PM PDT 24 |
11057625550 ps |
| T213 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.1072124806 |
|
|
Jun 09 03:16:13 PM PDT 24 |
Jun 09 03:22:08 PM PDT 24 |
3145154702 ps |
| T117 |
/workspace/coverage/default/11.chip_sw_lc_ctrl_transition.2979156272 |
|
|
Jun 09 03:42:17 PM PDT 24 |
Jun 09 04:00:34 PM PDT 24 |
10581242850 ps |
| T191 |
/workspace/coverage/default/1.chip_sw_flash_init.4207931967 |
|
|
Jun 09 03:18:21 PM PDT 24 |
Jun 09 03:57:03 PM PDT 24 |
16422658275 ps |
| T444 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.3085489949 |
|
|
Jun 09 03:48:36 PM PDT 24 |
Jun 09 03:54:23 PM PDT 24 |
3082146600 ps |
| T324 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.696142526 |
|
|
Jun 09 03:47:04 PM PDT 24 |
Jun 09 04:01:28 PM PDT 24 |
4968385586 ps |
| T537 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.3450178886 |
|
|
Jun 09 03:17:23 PM PDT 24 |
Jun 09 03:21:42 PM PDT 24 |
2927865550 ps |
| T131 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.3306665085 |
|
|
Jun 09 03:41:00 PM PDT 24 |
Jun 09 03:49:27 PM PDT 24 |
4374194540 ps |
| T82 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.1478192079 |
|
|
Jun 09 03:34:21 PM PDT 24 |
Jun 09 03:42:00 PM PDT 24 |
9802504200 ps |
| T204 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.908395197 |
|
|
Jun 09 03:18:48 PM PDT 24 |
Jun 09 03:35:58 PM PDT 24 |
6507194440 ps |
| T390 |
/workspace/coverage/default/1.chip_sw_aes_masking_off.1505536084 |
|
|
Jun 09 03:21:57 PM PDT 24 |
Jun 09 03:27:16 PM PDT 24 |
2915605751 ps |
| T83 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.4088655025 |
|
|
Jun 09 03:49:40 PM PDT 24 |
Jun 09 03:59:34 PM PDT 24 |
6067063728 ps |
| T241 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.3911944997 |
|
|
Jun 09 03:12:20 PM PDT 24 |
Jun 09 03:21:09 PM PDT 24 |
5144322400 ps |
| T268 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.147754154 |
|
|
Jun 09 03:42:10 PM PDT 24 |
Jun 09 03:51:25 PM PDT 24 |
4758271266 ps |
| T269 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.1559383184 |
|
|
Jun 09 03:40:14 PM PDT 24 |
Jun 09 03:49:29 PM PDT 24 |
3889709032 ps |
| T2 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.3116819383 |
|
|
Jun 09 03:37:23 PM PDT 24 |
Jun 09 03:46:21 PM PDT 24 |
6852887266 ps |
| T270 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.590784413 |
|
|
Jun 09 03:47:25 PM PDT 24 |
Jun 09 03:55:43 PM PDT 24 |
4542839936 ps |
| T271 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.4013236686 |
|
|
Jun 09 03:12:19 PM PDT 24 |
Jun 09 03:56:06 PM PDT 24 |
12981388476 ps |
| T272 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.2495567478 |
|
|
Jun 09 03:48:11 PM PDT 24 |
Jun 09 03:55:44 PM PDT 24 |
4289716918 ps |
| T273 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.2967537737 |
|
|
Jun 09 03:13:44 PM PDT 24 |
Jun 09 03:18:36 PM PDT 24 |
3488250614 ps |
| T154 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency_reduced_freq.1758303373 |
|
|
Jun 09 03:13:11 PM PDT 24 |
Jun 09 04:23:09 PM PDT 24 |
27905663290 ps |
| T274 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.3710912799 |
|
|
Jun 09 03:17:37 PM PDT 24 |
Jun 09 03:44:52 PM PDT 24 |
8740897904 ps |
| T538 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.843283516 |
|
|
Jun 09 03:30:51 PM PDT 24 |
Jun 09 03:49:53 PM PDT 24 |
5580678640 ps |
| T351 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.132459607 |
|
|
Jun 09 03:42:59 PM PDT 24 |
Jun 09 03:54:34 PM PDT 24 |
6103943946 ps |
| T395 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.979977673 |
|
|
Jun 09 03:13:14 PM PDT 24 |
Jun 09 03:17:39 PM PDT 24 |
2764254714 ps |
| T396 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.1536752792 |
|
|
Jun 09 03:30:25 PM PDT 24 |
Jun 09 03:36:06 PM PDT 24 |
3071410664 ps |
| T364 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.1908491021 |
|
|
Jun 09 03:30:11 PM PDT 24 |
Jun 09 03:50:34 PM PDT 24 |
7913024256 ps |
| T355 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.495032760 |
|
|
Jun 09 03:21:31 PM PDT 24 |
Jun 09 03:33:45 PM PDT 24 |
6735333770 ps |
| T397 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.3703085482 |
|
|
Jun 09 03:48:03 PM PDT 24 |
Jun 09 03:55:28 PM PDT 24 |
4802824660 ps |
| T398 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.1908908697 |
|
|
Jun 09 03:49:09 PM PDT 24 |
Jun 09 03:55:38 PM PDT 24 |
4557125332 ps |
| T399 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.2137430877 |
|
|
Jun 09 03:50:45 PM PDT 24 |
Jun 09 03:56:51 PM PDT 24 |
3773131336 ps |
| T330 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.3616147236 |
|
|
Jun 09 03:32:12 PM PDT 24 |
Jun 09 03:56:14 PM PDT 24 |
7731258146 ps |
| T400 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.2075603070 |
|
|
Jun 09 03:17:15 PM PDT 24 |
Jun 09 03:22:06 PM PDT 24 |
3074708392 ps |
| T68 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.112404879 |
|
|
Jun 09 03:19:22 PM PDT 24 |
Jun 09 04:14:01 PM PDT 24 |
13780549656 ps |
| T246 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.1358155807 |
|
|
Jun 09 03:44:46 PM PDT 24 |
Jun 09 03:52:57 PM PDT 24 |
3870526796 ps |
| T190 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.1321023714 |
|
|
Jun 09 03:11:47 PM PDT 24 |
Jun 09 03:16:06 PM PDT 24 |
3582484001 ps |
| T292 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.2866331182 |
|
|
Jun 09 03:16:29 PM PDT 24 |
Jun 09 03:22:00 PM PDT 24 |
2343899936 ps |
| T287 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.3934648475 |
|
|
Jun 09 03:20:30 PM PDT 24 |
Jun 09 03:31:19 PM PDT 24 |
3997028412 ps |
| T293 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.3836179602 |
|
|
Jun 09 03:14:25 PM PDT 24 |
Jun 09 03:24:31 PM PDT 24 |
3622852220 ps |
| T152 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.546890483 |
|
|
Jun 09 03:24:34 PM PDT 24 |
Jun 09 03:59:20 PM PDT 24 |
8355543182 ps |
| T294 |
/workspace/coverage/default/1.chip_sw_pwrmgr_b2b_sleep_reset_req.1173468312 |
|
|
Jun 09 03:26:00 PM PDT 24 |
Jun 09 04:11:06 PM PDT 24 |
26419210081 ps |
| T175 |
/workspace/coverage/default/2.chip_plic_all_irqs_0.2234053574 |
|
|
Jun 09 03:36:49 PM PDT 24 |
Jun 09 03:54:48 PM PDT 24 |
6133294484 ps |
| T295 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.2523643926 |
|
|
Jun 09 03:19:38 PM PDT 24 |
Jun 09 03:23:19 PM PDT 24 |
2785394312 ps |
| T165 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.3969462727 |
|
|
Jun 09 03:28:54 PM PDT 24 |
Jun 09 03:39:51 PM PDT 24 |
4132308000 ps |
| T189 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.3947893103 |
|
|
Jun 09 03:20:04 PM PDT 24 |
Jun 09 03:44:27 PM PDT 24 |
8836613018 ps |
| T187 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3271894842 |
|
|
Jun 09 03:30:36 PM PDT 24 |
Jun 09 03:44:47 PM PDT 24 |
4775360872 ps |
| T155 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.2385169396 |
|
|
Jun 09 03:27:46 PM PDT 24 |
Jun 09 04:35:27 PM PDT 24 |
24196874215 ps |
| T463 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.2085311215 |
|
|
Jun 09 03:40:23 PM PDT 24 |
Jun 09 03:48:50 PM PDT 24 |
3951942330 ps |
| T539 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.2173486183 |
|
|
Jun 09 03:13:22 PM PDT 24 |
Jun 09 03:34:21 PM PDT 24 |
6036407600 ps |
| T89 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.988083379 |
|
|
Jun 09 03:20:33 PM PDT 24 |
Jun 09 03:25:23 PM PDT 24 |
2506447710 ps |
| T540 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.1020821563 |
|
|
Jun 09 03:24:26 PM PDT 24 |
Jun 09 03:33:48 PM PDT 24 |
7680894008 ps |
| T185 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.3820174111 |
|
|
Jun 09 03:40:26 PM PDT 24 |
Jun 09 03:42:26 PM PDT 24 |
2935242012 ps |
| T449 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.1548188118 |
|
|
Jun 09 03:45:19 PM PDT 24 |
Jun 09 03:54:53 PM PDT 24 |
4972113296 ps |
| T179 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.4154405821 |
|
|
Jun 09 03:31:36 PM PDT 24 |
Jun 09 03:49:19 PM PDT 24 |
5029537000 ps |
| T461 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.402827661 |
|
|
Jun 09 03:46:01 PM PDT 24 |
Jun 09 03:57:42 PM PDT 24 |
5762020144 ps |
| T365 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.1831439174 |
|
|
Jun 09 03:28:55 PM PDT 24 |
Jun 09 03:39:53 PM PDT 24 |
4190247988 ps |
| T541 |
/workspace/coverage/default/0.chip_sw_aes_enc.97604710 |
|
|
Jun 09 03:11:05 PM PDT 24 |
Jun 09 03:15:28 PM PDT 24 |
2738592184 ps |
| T542 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.515684093 |
|
|
Jun 09 03:32:36 PM PDT 24 |
Jun 09 03:39:19 PM PDT 24 |
6566004824 ps |
| T242 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.363317219 |
|
|
Jun 09 03:30:58 PM PDT 24 |
Jun 09 03:46:08 PM PDT 24 |
5870704320 ps |
| T69 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.772901831 |
|
|
Jun 09 03:21:37 PM PDT 24 |
Jun 09 04:07:31 PM PDT 24 |
10886158137 ps |
| T316 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.308390682 |
|
|
Jun 09 03:29:39 PM PDT 24 |
Jun 09 03:38:12 PM PDT 24 |
4353446032 ps |
| T543 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.750945750 |
|
|
Jun 09 03:42:50 PM PDT 24 |
Jun 09 04:07:07 PM PDT 24 |
9253517174 ps |
| T325 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.1927534147 |
|
|
Jun 09 03:25:16 PM PDT 24 |
Jun 09 04:26:29 PM PDT 24 |
17815975756 ps |
| T446 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.126928794 |
|
|
Jun 09 03:45:53 PM PDT 24 |
Jun 09 03:55:17 PM PDT 24 |
4230754536 ps |
| T233 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.3848219798 |
|
|
Jun 09 03:36:00 PM PDT 24 |
Jun 09 04:06:01 PM PDT 24 |
18589923894 ps |
| T102 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.1388992254 |
|
|
Jun 09 03:14:49 PM PDT 24 |
Jun 09 03:24:16 PM PDT 24 |
4369693496 ps |
| T544 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.1536284757 |
|
|
Jun 09 03:34:38 PM PDT 24 |
Jun 09 03:57:18 PM PDT 24 |
7144976218 ps |
| T441 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.2348489367 |
|
|
Jun 09 03:44:52 PM PDT 24 |
Jun 09 03:53:56 PM PDT 24 |
5038282472 ps |
| T545 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.1543408833 |
|
|
Jun 09 03:27:51 PM PDT 24 |
Jun 09 03:36:58 PM PDT 24 |
4112957076 ps |
| T464 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.2811127344 |
|
|
Jun 09 03:48:18 PM PDT 24 |
Jun 09 03:59:58 PM PDT 24 |
5403845256 ps |
| T448 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.2747087568 |
|
|
Jun 09 03:51:59 PM PDT 24 |
Jun 09 04:02:48 PM PDT 24 |
4880989568 ps |
| T239 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.2689247060 |
|
|
Jun 09 03:19:14 PM PDT 24 |
Jun 09 03:33:00 PM PDT 24 |
3843378901 ps |
| T445 |
/workspace/coverage/default/18.chip_sw_alert_handler_lpg_sleep_mode_alerts.2529972466 |
|
|
Jun 09 03:43:40 PM PDT 24 |
Jun 09 03:50:19 PM PDT 24 |
4063227010 ps |
| T169 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.330621963 |
|
|
Jun 09 03:14:50 PM PDT 24 |
Jun 09 04:37:55 PM PDT 24 |
47265944070 ps |
| T124 |
/workspace/coverage/default/4.chip_tap_straps_prod.4008030826 |
|
|
Jun 09 03:40:42 PM PDT 24 |
Jun 09 03:56:38 PM PDT 24 |
8610399085 ps |
| T546 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.4220088165 |
|
|
Jun 09 03:35:50 PM PDT 24 |
Jun 09 03:41:21 PM PDT 24 |
3211576148 ps |
| T547 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_timeout.1400973591 |
|
|
Jun 09 03:34:12 PM PDT 24 |
Jun 09 03:41:27 PM PDT 24 |
4456084914 ps |
| T457 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.3168185174 |
|
|
Jun 09 03:43:14 PM PDT 24 |
Jun 09 03:52:13 PM PDT 24 |
4069044832 ps |
| T168 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2566780943 |
|
|
Jun 09 03:27:46 PM PDT 24 |
Jun 09 03:40:59 PM PDT 24 |
4774525200 ps |
| T548 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.2653690937 |
|
|
Jun 09 03:10:55 PM PDT 24 |
Jun 09 03:14:42 PM PDT 24 |
2474449064 ps |
| T309 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.1978810847 |
|
|
Jun 09 03:44:03 PM PDT 24 |
Jun 09 03:56:58 PM PDT 24 |
5619101322 ps |
| T311 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.3052513447 |
|
|
Jun 09 03:12:36 PM PDT 24 |
Jun 09 03:25:08 PM PDT 24 |
5046620192 ps |
| T3 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.2749850477 |
|
|
Jun 09 03:15:58 PM PDT 24 |
Jun 09 03:20:53 PM PDT 24 |
3112439290 ps |
| T166 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.1038131046 |
|
|
Jun 09 03:12:04 PM PDT 24 |
Jun 09 03:22:12 PM PDT 24 |
4126454434 ps |
| T411 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.366652482 |
|
|
Jun 09 03:45:21 PM PDT 24 |
Jun 09 03:57:23 PM PDT 24 |
6019587114 ps |
| T412 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.491970701 |
|
|
Jun 09 03:51:16 PM PDT 24 |
Jun 09 04:00:21 PM PDT 24 |
5536557160 ps |
| T188 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.4222456549 |
|
|
Jun 09 03:13:36 PM PDT 24 |
Jun 09 04:38:54 PM PDT 24 |
50800182216 ps |
| T413 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.38385689 |
|
|
Jun 09 03:11:43 PM PDT 24 |
Jun 09 03:21:08 PM PDT 24 |
4679892608 ps |
| T414 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.3135466587 |
|
|
Jun 09 03:35:05 PM PDT 24 |
Jun 09 03:49:44 PM PDT 24 |
6785438538 ps |
| T374 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.3565498765 |
|
|
Jun 09 03:47:41 PM PDT 24 |
Jun 09 03:57:31 PM PDT 24 |
6420984920 ps |
| T359 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.436897904 |
|
|
Jun 09 03:11:48 PM PDT 24 |
Jun 09 03:16:45 PM PDT 24 |
3098117950 ps |
| T415 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.3358773651 |
|
|
Jun 09 03:47:33 PM PDT 24 |
Jun 09 03:54:52 PM PDT 24 |
3681664600 ps |
| T549 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.22527068 |
|
|
Jun 09 03:37:16 PM PDT 24 |
Jun 09 03:59:25 PM PDT 24 |
5413073304 ps |
| T550 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.3474850449 |
|
|
Jun 09 03:17:52 PM PDT 24 |
Jun 09 03:23:37 PM PDT 24 |
2793537264 ps |
| T551 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.1722602587 |
|
|
Jun 09 03:41:00 PM PDT 24 |
Jun 09 04:06:02 PM PDT 24 |
8415763520 ps |
| T552 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.4070209315 |
|
|
Jun 09 03:43:04 PM PDT 24 |
Jun 09 04:36:10 PM PDT 24 |
13850215240 ps |
| T553 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.3035114811 |
|
|
Jun 09 03:12:30 PM PDT 24 |
Jun 09 03:29:11 PM PDT 24 |
8605101692 ps |
| T554 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_aes_trans.3562964784 |
|
|
Jun 09 03:38:07 PM PDT 24 |
Jun 09 03:47:55 PM PDT 24 |
4176126956 ps |
| T247 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.781823856 |
|
|
Jun 09 03:41:53 PM PDT 24 |
Jun 09 03:51:06 PM PDT 24 |
4488692660 ps |
| T375 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.3382145726 |
|
|
Jun 09 03:49:04 PM PDT 24 |
Jun 09 03:55:28 PM PDT 24 |
4521301560 ps |
| T317 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.4105281175 |
|
|
Jun 09 03:44:04 PM PDT 24 |
Jun 09 04:18:58 PM PDT 24 |
12749208980 ps |
| T192 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.3929122010 |
|
|
Jun 09 03:20:42 PM PDT 24 |
Jun 09 03:55:37 PM PDT 24 |
23356843568 ps |
| T450 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.3379176044 |
|
|
Jun 09 03:46:41 PM PDT 24 |
Jun 09 03:52:44 PM PDT 24 |
3747903730 ps |
| T434 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.2537490523 |
|
|
Jun 09 03:47:51 PM PDT 24 |
Jun 09 03:55:59 PM PDT 24 |
4123690500 ps |
| T555 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.4037449388 |
|
|
Jun 09 03:14:31 PM PDT 24 |
Jun 09 03:19:13 PM PDT 24 |
3641837648 ps |
| T556 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.1086622051 |
|
|
Jun 09 03:22:15 PM PDT 24 |
Jun 09 03:33:05 PM PDT 24 |
5510622464 ps |
| T557 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.2015403779 |
|
|
Jun 09 03:20:50 PM PDT 24 |
Jun 09 03:26:23 PM PDT 24 |
3863423292 ps |
| T39 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.3338772578 |
|
|
Jun 09 03:12:30 PM PDT 24 |
Jun 09 03:27:13 PM PDT 24 |
7372652144 ps |
| T7 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1230311841 |
|
|
Jun 09 03:26:05 PM PDT 24 |
Jun 09 04:02:03 PM PDT 24 |
24124752516 ps |
| T442 |
/workspace/coverage/default/30.chip_sw_alert_handler_lpg_sleep_mode_alerts.1416166225 |
|
|
Jun 09 03:46:27 PM PDT 24 |
Jun 09 03:53:15 PM PDT 24 |
4265809944 ps |
| T426 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.3463593087 |
|
|
Jun 09 03:12:04 PM PDT 24 |
Jun 09 04:13:57 PM PDT 24 |
16866733846 ps |
| T558 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.469621679 |
|
|
Jun 09 03:32:11 PM PDT 24 |
Jun 09 04:29:59 PM PDT 24 |
14602349480 ps |
| T153 |
/workspace/coverage/default/2.chip_sw_edn_kat.4216701023 |
|
|
Jun 09 03:33:50 PM PDT 24 |
Jun 09 03:44:13 PM PDT 24 |
3340543888 ps |
| T288 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2348304781 |
|
|
Jun 09 03:13:27 PM PDT 24 |
Jun 09 03:22:00 PM PDT 24 |
4176642695 ps |
| T559 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2353297332 |
|
|
Jun 09 03:14:41 PM PDT 24 |
Jun 09 04:07:13 PM PDT 24 |
34366125125 ps |
| T560 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.2455586025 |
|
|
Jun 09 03:12:12 PM PDT 24 |
Jun 09 03:22:20 PM PDT 24 |
4255960000 ps |
| T20 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.284543567 |
|
|
Jun 09 03:26:11 PM PDT 24 |
Jun 09 03:35:11 PM PDT 24 |
4532847106 ps |
| T454 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.2718048753 |
|
|
Jun 09 03:50:52 PM PDT 24 |
Jun 09 04:00:49 PM PDT 24 |
4542649338 ps |
| T262 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.2451847423 |
|
|
Jun 09 03:42:28 PM PDT 24 |
Jun 09 05:00:00 PM PDT 24 |
22636680310 ps |
| T561 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.1826070973 |
|
|
Jun 09 03:20:38 PM PDT 24 |
Jun 09 04:19:21 PM PDT 24 |
14099134852 ps |
| T178 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.217616891 |
|
|
Jun 09 03:32:54 PM PDT 24 |
Jun 09 03:36:20 PM PDT 24 |
2763550664 ps |
| T481 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.1197271083 |
|
|
Jun 09 03:51:52 PM PDT 24 |
Jun 09 04:01:57 PM PDT 24 |
6088063932 ps |
| T435 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.4008377974 |
|
|
Jun 09 03:43:02 PM PDT 24 |
Jun 09 03:50:48 PM PDT 24 |
4028877724 ps |
| T562 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3207540175 |
|
|
Jun 09 03:25:19 PM PDT 24 |
Jun 09 03:39:02 PM PDT 24 |
4878058556 ps |
| T346 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.1797541957 |
|
|
Jun 09 03:11:29 PM PDT 24 |
Jun 09 03:40:49 PM PDT 24 |
10072260642 ps |
| T254 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.113880480 |
|
|
Jun 09 03:13:44 PM PDT 24 |
Jun 09 03:17:48 PM PDT 24 |
2980974272 ps |
| T103 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_hmac_trans.963271750 |
|
|
Jun 09 03:35:11 PM PDT 24 |
Jun 09 03:41:50 PM PDT 24 |
4383035948 ps |
| T563 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2243381566 |
|
|
Jun 09 03:13:24 PM PDT 24 |
Jun 09 03:21:38 PM PDT 24 |
6402239336 ps |
| T564 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.393112952 |
|
|
Jun 09 03:19:00 PM PDT 24 |
Jun 09 03:23:26 PM PDT 24 |
3394366150 ps |
| T565 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1315874408 |
|
|
Jun 09 03:15:00 PM PDT 24 |
Jun 09 03:26:01 PM PDT 24 |
3797115800 ps |
| T566 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.3498295759 |
|
|
Jun 09 03:33:54 PM PDT 24 |
Jun 09 03:46:11 PM PDT 24 |
4561584230 ps |
| T183 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.360468655 |
|
|
Jun 09 03:20:24 PM PDT 24 |
Jun 09 03:23:14 PM PDT 24 |
2978402240 ps |
| T567 |
/workspace/coverage/default/0.chip_sw_alert_handler_reverse_ping_in_deep_sleep.454126651 |
|
|
Jun 09 03:12:35 PM PDT 24 |
Jun 09 06:54:15 PM PDT 24 |
254190688800 ps |
| T104 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.3151144428 |
|
|
Jun 09 03:49:04 PM PDT 24 |
Jun 09 03:58:45 PM PDT 24 |
6218057862 ps |
| T447 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.327899031 |
|
|
Jun 09 03:44:23 PM PDT 24 |
Jun 09 03:51:43 PM PDT 24 |
3908883720 ps |
| T232 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.2588247905 |
|
|
Jun 09 03:20:23 PM PDT 24 |
Jun 09 05:02:10 PM PDT 24 |
50008803417 ps |
| T568 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_otbn_trans.1605253366 |
|
|
Jun 09 03:24:55 PM PDT 24 |
Jun 09 03:31:34 PM PDT 24 |
4913146988 ps |
| T569 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.1572869367 |
|
|
Jun 09 03:39:54 PM PDT 24 |
Jun 09 03:46:17 PM PDT 24 |
6690731082 ps |
| T570 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.2633596683 |
|
|
Jun 09 03:12:13 PM PDT 24 |
Jun 09 03:30:35 PM PDT 24 |
11786450225 ps |
| T205 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.1373621355 |
|
|
Jun 09 03:13:10 PM PDT 24 |
Jun 09 03:24:51 PM PDT 24 |
4751926900 ps |
| T571 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.678415687 |
|
|
Jun 09 03:30:41 PM PDT 24 |
Jun 09 03:34:52 PM PDT 24 |
2951668030 ps |
| T572 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.339133536 |
|
|
Jun 09 03:28:17 PM PDT 24 |
Jun 09 03:31:04 PM PDT 24 |
2212665374 ps |
| T468 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.2259968851 |
|
|
Jun 09 03:48:56 PM PDT 24 |
Jun 09 03:59:29 PM PDT 24 |
5878318308 ps |
| T206 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.2196636435 |
|
|
Jun 09 03:19:10 PM PDT 24 |
Jun 09 03:32:25 PM PDT 24 |
4393484260 ps |
| T526 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.3432608077 |
|
|
Jun 09 03:46:11 PM PDT 24 |
Jun 09 03:52:13 PM PDT 24 |
3432785724 ps |
| T159 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.2116461149 |
|
|
Jun 09 03:41:22 PM PDT 24 |
Jun 09 03:55:55 PM PDT 24 |
7868664640 ps |
| T573 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usb_clk_disabled_when_active.1953819183 |
|
|
Jun 09 03:21:11 PM PDT 24 |
Jun 09 03:30:44 PM PDT 24 |
5044993856 ps |
| T401 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.2518868479 |
|
|
Jun 09 03:22:57 PM PDT 24 |
Jun 09 03:53:16 PM PDT 24 |
7804599550 ps |
| T506 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.1097498993 |
|
|
Jun 09 03:49:59 PM PDT 24 |
Jun 09 03:57:52 PM PDT 24 |
3556458960 ps |