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Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2123 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2125 1 T59 1 T60 1 T61 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 2123 1 T59 1 T60 1 T61 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 111724 1 T5 582 T42 585 T64 589



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 111790 1 T5 583 T42 585 T64 589



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 111724 1 T5 582 T42 585 T64 589


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 5892 1 T59 1 T82 48 T83 7



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 5893 1 T59 1 T82 48 T83 7



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 5892 1 T59 1 T82 48 T83 7


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 242 1 T59 1 T82 66 T83 7



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 243 1 T59 1 T82 66 T83 7



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 242 1 T59 1 T82 66 T83 7


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 14422 1 T59 1 T82 71 T83 3



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 14424 1 T59 1 T82 71 T83 3



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 14422 1 T59 1 T82 71 T83 3


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 248 1 T59 1 T82 53 T83 4



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 248 1 T59 1 T82 53 T83 4



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 248 1 T59 1 T82 53 T83 4


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 8165 1 T59 1 T82 64 T463 1728



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 8174 1 T59 1 T82 64 T463 1729



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 8165 1 T59 1 T82 64 T463 1728


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 241 1 T59 1 T82 51 T83 4



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 241 1 T59 1 T82 51 T83 4



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 241 1 T59 1 T82 51 T83 4


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3676 1 T59 1 T82 60 T83 4



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3677 1 T59 1 T82 60 T83 4



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3676 1 T59 1 T82 60 T83 4


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 453 1 T168 5 T461 2 T59 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 454 1 T168 5 T461 2 T59 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 453 1 T168 5 T461 2 T59 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 271 1 T59 1 T82 78 T83 6



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 271 1 T59 1 T82 78 T83 6



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 271 1 T59 1 T82 78 T83 6


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2440 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2441 1 T59 1 T60 1 T61 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 2440 1 T59 1 T60 1 T61 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 559 1 T59 1 T82 65 T83 2



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 559 1 T59 1 T82 65 T83 2



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 559 1 T59 1 T82 65 T83 2


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 10328 1 T59 1 T82 65 T83 2



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 10333 1 T59 1 T82 65 T83 2



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 10328 1 T59 1 T82 65 T83 2


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2662 1 T59 1 T398 522 T60 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2662 1 T59 1 T398 522 T60 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 2662 1 T59 1 T398 522 T60 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 5982 1 T5 808 T59 1 T60 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 5984 1 T5 808 T59 1 T60 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 5982 1 T5 808 T59 1 T60 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3558 1 T59 1 T399 512 T60 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3559 1 T59 1 T399 512 T60 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3558 1 T59 1 T399 512 T60 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4818 1 T59 1 T82 55 T83 5



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4819 1 T59 1 T82 55 T83 5



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4818 1 T59 1 T82 55 T83 5


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 242 1 T59 1 T82 60 T83 4



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 242 1 T59 1 T82 60 T83 4



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 242 1 T59 1 T82 60 T83 4


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 110543 1 T5 582 T42 585 T64 589



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 110609 1 T5 583 T42 585 T64 589



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 110543 1 T5 582 T42 585 T64 589


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 594 1 T59 1 T82 61 T83 3



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 594 1 T59 1 T82 61 T83 3



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 594 1 T59 1 T82 61 T83 3


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2739 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2741 1 T59 1 T60 1 T61 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 2739 1 T59 1 T60 1 T61 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 90 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 90 1 T59 1 T60 1 T61 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 90 1 T59 1 T60 1 T61 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 5484 1 T59 1 T377 817 T60 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 5490 1 T59 1 T377 818 T60 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 5484 1 T59 1 T377 817 T60 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4139 1 T59 1 T244 812 T60 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4144 1 T59 1 T244 813 T60 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4139 1 T59 1 T244 812 T60 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 1387829 1 T5 582 T42 585 T64 589



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 1387897 1 T5 583 T42 585 T64 589



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 1387829 1 T5 582 T42 585 T64 589


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 563 1 T59 1 T82 55 T399 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 563 1 T59 1 T82 55 T399 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 563 1 T59 1 T82 55 T399 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 605 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 605 1 T59 1 T60 1 T61 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 605 1 T59 1 T60 1 T61 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 50994 1 T5 276 T42 276 T64 278



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 51103 1 T5 276 T42 276 T64 279



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 50994 1 T5 276 T42 276 T64 278


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 889 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 890 1 T59 1 T60 1 T61 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 889 1 T59 1 T60 1 T61 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 6746 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 6749 1 T59 1 T60 1 T61 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 6746 1 T59 1 T60 1 T61 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 75 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 75 1 T59 1 T60 1 T61 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 75 1 T59 1 T60 1 T61 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3063 1 T59 1 T376 819 T60 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3066 1 T59 1 T376 820 T60 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3063 1 T59 1 T376 819 T60 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2707 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2709 1 T59 1 T60 1 T61 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 2707 1 T59 1 T60 1 T61 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2220 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2221 1 T59 1 T60 1 T61 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 2220 1 T59 1 T60 1 T61 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 893 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 897 1 T59 1 T82 1 T60 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 893 1 T59 1 T60 1 T61 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 6033 1 T59 1 T113 1 T771 495



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 6057 1 T169 1 T59 1 T113 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 6033 1 T59 1 T113 1 T771 495


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4229 1 T59 1 T82 53 T83 8



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4229 1 T59 1 T82 53 T83 8



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4229 1 T59 1 T82 53 T83 8


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 2533 1 T59 1 T60 1 T61 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 2535 1 T59 1 T60 1 T61 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%