Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.hmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	165645	1			T75	18		T76	55		T77	66
values[2]	4386	1			T77	2		T271	1		T469	30
values[3]	1899	1			T271	1		T512	2		T509	1
values[4]	1217	1			T271	1		T499	1		T481	6
values[5]	995	1			T271	1		T499	1		T481	5
values[6]	804	1			T271	1		T499	1		T481	2
values[7]	670	1			T271	1		T499	1		T481	3
values[8]	609	1			T271	1		T499	1		T481	2
values[9]	546	1			T271	1		T499	1		T481	1
values[10]	520	1			T271	1		T499	1		T481	5
values[11]	501	1			T271	1		T499	1		T481	3
values[12]	409	1			T271	1		T499	1		T481	8
values[13]	341	1			T271	1		T499	1		T481	4
values[14]	333	1			T271	1		T499	1		T481	4
values[15]	272	1			T271	1		T499	1		T481	3
values[16]	243	1			T271	1		T499	1		T481	2
values[17]	190	1			T271	1		T499	1		T481	4
values[18]	159	1			T271	1		T499	1		T481	1
values[19]	147	1			T271	1		T499	1		T481	3
values[20]	154	1			T271	1		T499	1		T481	4
values[21]	109	1			T271	1		T499	1		T481	1
values[22]	110	1			T271	1		T499	1		T481	4
values[23]	103	1			T271	1		T499	1		T481	6
values[24]	91	1			T271	1		T499	1		T481	5
values[25]	92	1			T271	1		T499	1		T481	4
values[26]	96	1			T271	1		T499	1		T481	4
values[27]	94	1			T271	1		T499	1		T481	4
values[28]	106	1			T271	1		T499	1		T481	3
values[29]	113	1			T271	1		T499	1		T481	3
values[30]	109	1			T271	1		T499	1		T481	1
values[31]	83	1			T271	1		T499	1		T481	2
values[32]	87	1			T271	1		T499	1		T481	3
values[33]	110	1			T271	1		T499	1		T481	1
values[34]	118	1			T271	1		T499	1		T481	3
values[35]	91	1			T271	1		T499	1		T481	3
values[36]	96	1			T271	1		T499	1		T481	3
values[37]	93	1			T271	1		T499	1		T481	1
values[38]	85	1			T271	1		T499	1		T481	3
values[39]	56	1			T271	1		T499	1		T481	2
values[40]	64	1			T271	1		T499	1		T481	2
values[41]	68	1			T271	1		T499	1		T481	3
values[42]	73	1			T271	1		T499	1		T481	3
values[43]	60	1			T271	1		T499	1		T481	2
values[44]	47	1			T271	1		T499	1		T481	2
values[45]	56	1			T271	1		T499	1		T481	1
values[46]	57	1			T271	1		T499	1		T481	2
values[47]	69	1			T271	1		T499	1		T481	6
values[48]	62	1			T271	1		T499	1		T481	1
values[49]	66	1			T271	1		T499	1		T481	3
values[50]	61	1			T271	1		T499	1		T481	5
values[51]	59	1			T271	1		T499	1		T481	4
values[52]	47	1			T271	1		T499	1		T481	2
values[53]	58	1			T271	1		T499	1		T481	2
values[54]	56	1			T271	1		T499	1		T481	3
values[55]	54	1			T271	1		T499	1		T481	4
values[56]	61	1			T271	1		T499	1		T481	1
values[57]	64	1			T271	1		T499	1		T481	2
values[58]	61	1			T271	1		T499	1		T481	1
values[59]	56	1			T271	1		T499	1		T481	3
values[60]	61	1			T271	1		T499	1		T481	1
values[61]	57	1			T271	1		T499	1		T481	7
values[62]	56	1			T271	1		T499	1		T481	2
values[63]	58	1			T271	1		T499	1		T481	2
values[64]	58	1			T271	1		T499	1		T481	1
values[65]	58	1			T271	1		T499	1		T481	1
values[66]	58	1			T271	1		T499	1		T481	1
values[67]	75	1			T271	1		T499	1		T481	6
values[68]	72	1			T271	1		T499	1		T481	6
values[69]	59	1			T271	1		T499	1		T481	1
values[70]	65	1			T271	1		T499	1		T481	4
values[71]	68	1			T271	1		T499	1		T481	5
values[72]	60	1			T271	1		T499	1		T481	5
values[73]	66	1			T271	1		T499	1		T481	3
values[74]	54	1			T271	1		T499	1		T481	3
values[75]	67	1			T271	1		T499	1		T481	2
values[76]	63	1			T271	1		T499	1		T481	3
values[77]	60	1			T271	1		T499	1		T481	2
values[78]	57	1			T271	1		T499	1		T481	1
values[79]	72	1			T271	1		T499	1		T481	1
values[80]	62	1			T271	1		T499	1		T481	1
values[81]	69	1			T271	1		T499	2		T481	3
values[82]	63	1			T271	1		T499	2		T481	4
values[83]	69	1			T271	1		T499	5		T481	2
values[84]	73	1			T271	1		T499	3		T481	1
values[85]	69	1			T271	1		T499	4		T481	4
values[86]	55	1			T271	1		T499	2		T481	4
values[87]	68	1			T271	1		T499	2		T481	2
values[88]	81	1			T271	1		T499	6		T481	2
values[89]	70	1			T271	1		T499	6		T481	1
values[90]	68	1			T271	1		T499	2		T481	4
values[91]	86	1			T271	1		T499	1		T481	5
values[92]	97	1			T271	1		T499	5		T481	16
values[93]	84	1			T271	1		T499	4		T481	12
values[94]	85	1			T271	2		T499	1		T481	6
values[95]	75	1			T271	2		T499	2		T481	4
values[96]	96	1			T271	1		T499	1		T481	6
values[97]	78	1			T271	3		T499	1		T481	1
values[98]	93	1			T271	3		T499	2		T481	7
values[99]	92	1			T271	1		T499	1		T481	6
values[100]	92	1			T271	3		T499	2		T481	5
values[101]	92	1			T271	1		T499	4		T481	9
values[102]	96	1			T271	4		T499	2		T481	13
values[103]	108	1			T271	4		T499	2		T481	19
values[104]	92	1			T271	5		T499	3		T481	5
values[105]	86	1			T271	2		T499	5		T481	12
values[106]	91	1			T271	2		T499	5		T481	11
values[107]	97	1			T271	4		T499	2		T481	6
values[108]	87	1			T271	4		T499	1		T481	4
values[109]	80	1			T271	3		T499	1		T481	6
values[110]	80	1			T271	2		T499	2		T481	5
values[111]	70	1			T271	1		T499	4		T481	5
values[112]	109	1			T271	2		T499	8		T481	10
values[113]	79	1			T271	1		T499	2		T481	7
values[114]	105	1			T271	2		T499	3		T481	5
values[115]	115	1			T271	2		T499	2		T481	6
values[116]	106	1			T271	3		T499	3		T481	9
values[117]	99	1			T271	3		T499	2		T481	6
values[118]	103	1			T271	1		T499	3		T481	2
values[119]	108	1			T271	1		T499	3		T481	2
values[120]	104	1			T271	1		T499	1		T481	5
values[121]	121	1			T271	3		T499	3		T481	3
values[122]	142	1			T271	4		T499	3		T481	3
values[123]	160	1			T271	2		T499	1		T481	3
values[124]	225	1			T271	2		T499	1		T481	9
values[125]	426	1			T271	1		T499	1		T481	10
values[126]	783	1			T271	13		T499	7		T481	9
values[127]	2704	1			T271	85		T499	89		T481	4
values[128]	4606	1			T271	217		T499	191		T877	230