Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	139778	1			T75	13		T76	42		T77	61
values[2]	7906	1			T77	2		T469	5		T454	1
values[3]	2777	1			T557	11		T452	1		T441	80
values[4]	1494	1			T557	6		T452	1		T441	35
values[5]	1085	1			T557	5		T452	1		T441	23
values[6]	843	1			T557	7		T452	1		T441	12
values[7]	656	1			T557	4		T452	1		T441	8
values[8]	524	1			T557	13		T452	1		T441	7
values[9]	452	1			T557	3		T452	1		T441	1
values[10]	417	1			T557	8		T452	1		T442	1
values[11]	433	1			T557	10		T452	1		T442	1
values[12]	300	1			T557	3		T452	1		T442	1
values[13]	297	1			T557	14		T452	1		T442	1
values[14]	336	1			T557	6		T452	1		T442	1
values[15]	346	1			T557	4		T452	1		T442	1
values[16]	330	1			T557	3		T452	1		T442	1
values[17]	273	1			T557	5		T452	1		T442	1
values[18]	277	1			T557	12		T452	1		T442	1
values[19]	289	1			T557	6		T452	1		T442	1
values[20]	307	1			T557	13		T452	1		T442	1
values[21]	284	1			T557	19		T452	1		T442	1
values[22]	288	1			T557	7		T452	1		T442	1
values[23]	287	1			T557	3		T452	1		T442	1
values[24]	239	1			T557	2		T452	1		T442	1
values[25]	317	1			T557	9		T452	1		T442	1
values[26]	290	1			T557	16		T452	1		T442	1
values[27]	263	1			T557	13		T452	1		T442	1
values[28]	296	1			T557	5		T452	1		T442	1
values[29]	259	1			T557	4		T452	1		T442	1
values[30]	257	1			T557	7		T452	1		T442	1
values[31]	272	1			T557	8		T452	1		T442	1
values[32]	243	1			T557	4		T452	1		T442	1
values[33]	251	1			T557	3		T452	1		T442	1
values[34]	291	1			T557	14		T452	1		T442	1
values[35]	308	1			T557	6		T452	1		T442	1
values[36]	284	1			T557	4		T452	1		T442	1
values[37]	277	1			T557	4		T452	1		T442	1
values[38]	238	1			T557	8		T452	1		T442	1
values[39]	246	1			T557	8		T452	1		T442	1
values[40]	260	1			T557	7		T452	1		T442	1
values[41]	280	1			T557	4		T452	1		T442	1
values[42]	257	1			T557	19		T452	1		T442	1
values[43]	285	1			T557	4		T452	1		T442	1
values[44]	266	1			T557	3		T452	2		T442	1
values[45]	283	1			T557	8		T452	1		T442	1
values[46]	225	1			T557	5		T452	1		T442	1
values[47]	237	1			T557	9		T452	1		T442	1
values[48]	278	1			T557	5		T452	1		T442	1
values[49]	256	1			T557	6		T452	1		T442	1
values[50]	218	1			T557	2		T452	1		T442	1
values[51]	238	1			T557	5		T452	1		T442	1
values[52]	281	1			T557	18		T452	1		T442	1
values[53]	263	1			T557	4		T452	1		T442	1
values[54]	210	1			T557	6		T452	1		T442	1
values[55]	212	1			T557	9		T452	1		T442	1
values[56]	178	1			T557	6		T452	1		T442	1
values[57]	168	1			T557	6		T452	1		T442	1
values[58]	150	1			T557	2		T452	1		T442	1
values[59]	161	1			T557	9		T452	1		T442	1
values[60]	132	1			T557	2		T452	1		T442	1
values[61]	136	1			T557	4		T452	1		T442	1
values[62]	113	1			T557	3		T452	1		T442	1
values[63]	149	1			T557	3		T452	1		T442	1
values[64]	119	1			T557	5		T452	1		T442	1
values[65]	106	1			T557	4		T452	1		T442	1
values[66]	93	1			T557	3		T452	1		T442	1
values[67]	94	1			T557	14		T452	1		T442	1
values[68]	94	1			T557	6		T452	1		T442	1
values[69]	77	1			T557	3		T452	1		T442	1
values[70]	100	1			T557	9		T452	1		T442	1
values[71]	138	1			T557	11		T452	1		T442	1
values[72]	137	1			T557	5		T452	1		T442	1
values[73]	102	1			T452	1		T442	1		T499	1
values[74]	77	1			T452	1		T442	1		T499	1
values[75]	71	1			T452	1		T442	1		T499	1
values[76]	65	1			T452	1		T442	1		T499	1
values[77]	69	1			T452	1		T442	1		T499	1
values[78]	71	1			T452	1		T442	1		T499	1
values[79]	61	1			T452	1		T442	1		T499	1
values[80]	65	1			T452	1		T442	1		T499	1
values[81]	66	1			T452	1		T442	1		T499	1
values[82]	71	1			T452	1		T442	1		T499	1
values[83]	55	1			T452	1		T442	1		T499	1
values[84]	58	1			T452	1		T442	1		T499	1
values[85]	56	1			T452	1		T442	1		T499	1
values[86]	64	1			T452	1		T442	1		T499	1
values[87]	77	1			T452	1		T442	1		T499	1
values[88]	62	1			T452	1		T442	1		T499	1
values[89]	55	1			T452	1		T442	1		T499	1
values[90]	68	1			T452	1		T442	1		T499	1
values[91]	79	1			T452	1		T442	1		T499	1
values[92]	80	1			T452	2		T442	1		T499	1
values[93]	82	1			T452	3		T442	1		T499	1
values[94]	69	1			T452	1		T442	1		T499	1
values[95]	59	1			T452	1		T442	1		T499	1
values[96]	51	1			T452	3		T442	1		T499	1
values[97]	51	1			T452	1		T442	1		T499	1
values[98]	66	1			T452	4		T442	1		T499	1
values[99]	61	1			T452	2		T442	1		T499	1
values[100]	59	1			T452	2		T442	1		T499	1
values[101]	59	1			T452	1		T442	1		T499	1
values[102]	58	1			T452	2		T442	1		T499	1
values[103]	72	1			T452	1		T442	1		T499	1
values[104]	78	1			T452	6		T442	1		T499	1
values[105]	48	1			T452	3		T442	1		T499	1
values[106]	55	1			T452	5		T442	1		T499	1
values[107]	68	1			T452	4		T442	1		T499	1
values[108]	47	1			T452	1		T442	1		T499	1
values[109]	63	1			T452	6		T442	1		T499	1
values[110]	60	1			T452	2		T442	1		T499	1
values[111]	50	1			T452	3		T442	1		T499	1
values[112]	72	1			T452	3		T442	2		T499	1
values[113]	63	1			T452	1		T442	1		T499	1
values[114]	56	1			T452	1		T442	1		T499	1
values[115]	63	1			T452	3		T442	1		T499	1
values[116]	76	1			T452	4		T442	1		T499	1
values[117]	78	1			T452	5		T442	2		T499	1
values[118]	56	1			T452	1		T442	1		T499	1
values[119]	57	1			T452	1		T442	1		T499	1
values[120]	66	1			T452	1		T442	3		T499	1
values[121]	60	1			T452	5		T442	1		T499	1
values[122]	54	1			T452	2		T442	2		T499	1
values[123]	67	1			T452	1		T442	2		T499	1
values[124]	59	1			T452	2		T442	3		T499	2
values[125]	61	1			T452	1		T442	1		T499	2
values[126]	79	1			T452	1		T442	1		T499	1
values[127]	685	1			T452	35		T442	35		T499	23
values[128]	5618	1			T452	317		T442	357		T499	276