Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_device_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	139917	1			T75	13		T76	56		T77	59
values[2]	7210	1			T77	1		T271	1		T469	5
values[3]	2289	1			T271	1		T512	1		T452	1
values[4]	1383	1			T271	1		T452	1		T509	79
values[5]	954	1			T271	1		T452	1		T509	33
values[6]	731	1			T271	1		T452	1		T509	1
values[7]	601	1			T271	1		T452	1		T757	15
values[8]	494	1			T271	1		T452	1		T689	4
values[9]	442	1			T271	1		T452	1		T689	11
values[10]	418	1			T271	1		T452	1		T689	7
values[11]	385	1			T271	1		T452	1		T689	13
values[12]	401	1			T271	1		T452	1		T689	5
values[13]	402	1			T271	1		T452	1		T689	6
values[14]	348	1			T271	1		T452	1		T689	11
values[15]	413	1			T271	1		T452	1		T689	4
values[16]	361	1			T271	1		T452	1		T689	7
values[17]	397	1			T271	1		T452	1		T689	3
values[18]	381	1			T271	1		T452	1		T689	3
values[19]	358	1			T271	1		T452	1		T689	10
values[20]	358	1			T271	1		T452	1		T689	14
values[21]	361	1			T271	1		T452	1		T689	8
values[22]	368	1			T271	1		T452	1		T689	8
values[23]	368	1			T271	1		T452	1		T689	4
values[24]	393	1			T271	1		T452	1		T689	6
values[25]	391	1			T271	1		T452	1		T689	7
values[26]	335	1			T271	1		T452	1		T689	6
values[27]	371	1			T271	1		T452	1		T689	7
values[28]	397	1			T271	1		T452	1		T689	8
values[29]	358	1			T271	1		T452	1		T689	9
values[30]	332	1			T271	1		T452	1		T689	4
values[31]	370	1			T271	1		T452	1		T689	11
values[32]	316	1			T271	1		T452	1		T689	5
values[33]	313	1			T271	2		T452	1		T689	6
values[34]	317	1			T271	1		T452	1		T689	4
values[35]	404	1			T271	1		T452	1		T689	8
values[36]	361	1			T271	1		T452	1		T689	5
values[37]	338	1			T271	1		T452	1		T689	4
values[38]	385	1			T271	1		T452	1		T689	5
values[39]	393	1			T271	1		T452	1		T689	8
values[40]	305	1			T271	1		T452	1		T689	9
values[41]	304	1			T271	1		T452	1		T689	14
values[42]	317	1			T271	1		T452	1		T689	8
values[43]	328	1			T271	1		T452	1		T689	10
values[44]	291	1			T271	1		T452	2		T689	9
values[45]	317	1			T271	1		T452	1		T689	6
values[46]	341	1			T271	1		T452	2		T689	6
values[47]	357	1			T271	1		T452	1		T689	5
values[48]	380	1			T271	1		T452	1		T689	6
values[49]	313	1			T271	1		T452	1		T689	2
values[50]	333	1			T271	1		T452	1		T689	15
values[51]	327	1			T271	1		T452	1		T689	5
values[52]	311	1			T271	1		T452	1		T689	3
values[53]	341	1			T271	1		T452	1		T689	4
values[54]	301	1			T271	1		T452	1		T689	4
values[55]	320	1			T271	1		T452	1		T689	8
values[56]	276	1			T271	1		T452	1		T689	9
values[57]	285	1			T271	1		T452	1		T689	11
values[58]	261	1			T271	1		T452	1		T689	5
values[59]	239	1			T271	1		T452	1		T689	6
values[60]	226	1			T271	1		T452	1		T689	6
values[61]	210	1			T271	1		T452	1		T689	10
values[62]	213	1			T271	1		T452	2		T689	9
values[63]	240	1			T271	1		T452	1		T689	9
values[64]	275	1			T271	1		T452	1		T689	10
values[65]	204	1			T271	1		T452	1		T689	5
values[66]	169	1			T271	1		T452	1		T689	9
values[67]	154	1			T271	1		T452	1		T689	8
values[68]	173	1			T271	1		T452	1		T689	9
values[69]	187	1			T271	1		T452	1		T689	5
values[70]	164	1			T271	1		T452	1		T689	3
values[71]	140	1			T271	1		T452	1		T689	3
values[72]	105	1			T271	1		T452	1		T689	5
values[73]	103	1			T271	1		T452	1		T689	5
values[74]	79	1			T271	1		T452	1		T689	6
values[75]	75	1			T271	1		T452	1		T689	3
values[76]	93	1			T271	1		T452	1		T689	8
values[77]	89	1			T271	1		T452	1		T689	8
values[78]	75	1			T271	1		T452	1		T689	2
values[79]	77	1			T271	1		T452	1		T866	1
values[80]	79	1			T271	1		T452	1		T866	1
values[81]	96	1			T271	1		T452	1		T866	1
values[82]	77	1			T271	1		T452	1		T866	1
values[83]	87	1			T271	1		T452	1		T866	1
values[84]	88	1			T271	1		T452	1		T866	1
values[85]	62	1			T271	1		T452	1		T866	1
values[86]	64	1			T271	1		T452	1		T866	1
values[87]	88	1			T271	1		T452	1		T866	1
values[88]	90	1			T271	1		T452	1		T866	1
values[89]	68	1			T271	1		T452	1		T866	1
values[90]	76	1			T271	1		T452	1		T866	1
values[91]	99	1			T271	1		T452	1		T866	1
values[92]	78	1			T271	1		T452	1		T866	1
values[93]	58	1			T271	1		T452	1		T866	1
values[94]	63	1			T271	1		T452	1		T866	2
values[95]	67	1			T271	1		T452	1		T866	4
values[96]	69	1			T271	1		T452	1		T866	2
values[97]	64	1			T271	1		T452	1		T866	1
values[98]	74	1			T271	1		T452	1		T866	2
values[99]	93	1			T271	2		T452	1		T866	1
values[100]	73	1			T271	1		T452	1		T866	1
values[101]	57	1			T271	1		T452	1		T866	6
values[102]	57	1			T271	1		T452	1		T866	5
values[103]	51	1			T271	3		T452	1		T866	2
values[104]	63	1			T271	2		T452	3		T866	4
values[105]	81	1			T271	2		T452	1		T866	6
values[106]	73	1			T271	1		T452	2		T866	2
values[107]	69	1			T271	1		T452	4		T866	1
values[108]	53	1			T271	1		T452	5		T866	2
values[109]	72	1			T271	2		T452	2		T866	1
values[110]	73	1			T271	1		T452	2		T866	3
values[111]	60	1			T271	1		T452	2		T866	2
values[112]	57	1			T271	1		T452	3		T866	1
values[113]	62	1			T271	3		T452	1		T866	3
values[114]	78	1			T271	2		T452	1		T866	5
values[115]	72	1			T271	1		T452	1		T866	2
values[116]	56	1			T271	1		T452	2		T866	2
values[117]	53	1			T271	1		T452	3		T866	2
values[118]	50	1			T271	5		T452	3		T866	1
values[119]	47	1			T271	2		T452	2		T866	3
values[120]	75	1			T271	2		T452	1		T866	8
values[121]	57	1			T271	1		T452	4		T866	1
values[122]	60	1			T271	1		T452	3		T866	6
values[123]	51	1			T271	2		T452	1		T866	1
values[124]	54	1			T271	1		T452	3		T866	1
values[125]	72	1			T271	2		T452	1		T866	2
values[126]	132	1			T271	2		T452	1		T866	3
values[127]	738	1			T271	21		T452	29		T866	37
values[128]	6195	1			T271	246		T452	311		T866	272