Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pwm_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	131452	1			T75	71		T77	5		T79	90
values[2]	8745	1			T79	7		T492	1		T401	6
values[3]	3436	1			T516	4		T490	3		T805	1
values[4]	2150	1			T792	1		T791	5		T790	2
values[5]	1531	1			T792	1		T791	9		T790	2
values[6]	996	1			T792	1		T791	5		T790	2
values[7]	696	1			T792	1		T791	3		T790	2
values[8]	495	1			T792	1		T791	8		T790	2
values[9]	420	1			T792	1		T791	8		T790	2
values[10]	343	1			T792	1		T791	18		T790	3
values[11]	299	1			T792	1		T791	4		T790	2
values[12]	269	1			T792	1		T791	4		T790	2
values[13]	272	1			T792	1		T791	4		T790	2
values[14]	242	1			T792	1		T791	13		T790	2
values[15]	263	1			T792	1		T791	4		T790	2
values[16]	287	1			T792	1		T791	8		T790	2
values[17]	349	1			T792	1		T791	23		T790	2
values[18]	253	1			T792	1		T791	4		T790	2
values[19]	280	1			T792	1		T791	8		T790	2
values[20]	270	1			T792	1		T791	3		T790	2
values[21]	239	1			T792	1		T791	2		T790	2
values[22]	265	1			T792	1		T791	4		T790	2
values[23]	264	1			T792	1		T791	5		T790	2
values[24]	287	1			T792	1		T791	4		T790	2
values[25]	280	1			T792	1		T791	21		T790	2
values[26]	230	1			T792	1		T791	16		T790	2
values[27]	281	1			T792	1		T791	7		T790	2
values[28]	246	1			T792	1		T791	10		T790	2
values[29]	257	1			T792	1		T791	2		T790	2
values[30]	233	1			T792	1		T791	8		T790	2
values[31]	209	1			T792	1		T791	3		T790	2
values[32]	226	1			T792	1		T791	6		T790	2
values[33]	227	1			T792	1		T791	9		T790	2
values[34]	236	1			T792	1		T791	8		T790	2
values[35]	250	1			T792	1		T791	6		T790	2
values[36]	255	1			T792	1		T791	9		T790	2
values[37]	252	1			T792	1		T791	7		T790	2
values[38]	257	1			T792	1		T791	15		T790	2
values[39]	233	1			T792	1		T791	5		T790	2
values[40]	250	1			T792	1		T791	7		T790	2
values[41]	223	1			T792	1		T791	5		T790	2
values[42]	244	1			T792	1		T791	13		T790	2
values[43]	251	1			T792	1		T791	4		T790	2
values[44]	227	1			T792	1		T791	8		T790	2
values[45]	220	1			T792	1		T790	2		T804	1
values[46]	225	1			T792	1		T790	2		T804	1
values[47]	193	1			T792	1		T790	2		T804	1
values[48]	223	1			T792	1		T790	2		T804	1
values[49]	251	1			T792	1		T790	2		T804	1
values[50]	224	1			T792	1		T790	2		T804	1
values[51]	234	1			T792	1		T790	2		T804	1
values[52]	209	1			T792	1		T790	2		T804	1
values[53]	196	1			T792	1		T790	2		T804	1
values[54]	188	1			T792	1		T790	2		T804	1
values[55]	198	1			T792	1		T790	2		T804	1
values[56]	185	1			T792	1		T790	3		T804	1
values[57]	218	1			T792	1		T790	2		T804	1
values[58]	196	1			T792	1		T790	2		T804	1
values[59]	194	1			T792	1		T790	3		T804	1
values[60]	195	1			T792	1		T790	2		T804	1
values[61]	191	1			T792	1		T790	2		T804	1
values[62]	185	1			T792	1		T790	2		T804	1
values[63]	147	1			T792	1		T790	3		T804	1
values[64]	179	1			T792	1		T790	2		T804	1
values[65]	136	1			T792	1		T790	2		T804	1
values[66]	206	1			T792	1		T790	2		T804	1
values[67]	197	1			T792	1		T790	2		T804	1
values[68]	167	1			T792	1		T790	2		T804	1
values[69]	166	1			T792	1		T790	2		T804	1
values[70]	148	1			T792	1		T790	2		T804	1
values[71]	196	1			T792	1		T790	2		T804	1
values[72]	189	1			T792	1		T790	2		T804	1
values[73]	175	1			T792	1		T790	2		T804	1
values[74]	133	1			T792	1		T790	2		T804	1
values[75]	130	1			T792	1		T790	2		T804	1
values[76]	138	1			T792	1		T790	3		T804	1
values[77]	104	1			T792	1		T790	2		T804	2
values[78]	104	1			T792	1		T790	2		T804	1
values[79]	95	1			T792	1		T790	2		T804	1
values[80]	93	1			T792	1		T790	2		T804	1
values[81]	91	1			T792	2		T790	2		T804	1
values[82]	74	1			T792	1		T790	2		T804	1
values[83]	94	1			T792	1		T790	2		T804	1
values[84]	100	1			T792	1		T790	2		T804	1
values[85]	91	1			T792	1		T790	2		T804	1
values[86]	79	1			T792	1		T790	2		T804	1
values[87]	88	1			T792	1		T790	2		T804	1
values[88]	98	1			T792	1		T790	2		T804	1
values[89]	93	1			T792	1		T790	3		T804	1
values[90]	93	1			T792	1		T790	2		T804	1
values[91]	76	1			T792	1		T790	2		T804	1
values[92]	82	1			T792	1		T790	2		T804	1
values[93]	72	1			T792	2		T790	2		T804	1
values[94]	82	1			T792	1		T790	2		T804	1
values[95]	83	1			T792	2		T790	2		T804	1
values[96]	89	1			T792	3		T790	2		T804	1
values[97]	74	1			T792	1		T790	2		T804	1
values[98]	98	1			T792	1		T790	2		T804	1
values[99]	67	1			T792	1		T790	2		T804	1
values[100]	72	1			T792	2		T790	2		T804	1
values[101]	111	1			T792	3		T790	2		T804	1
values[102]	95	1			T792	1		T790	2		T804	1
values[103]	93	1			T792	4		T790	2		T804	3
values[104]	99	1			T792	3		T790	2		T804	1
values[105]	106	1			T792	4		T790	2		T804	2
values[106]	85	1			T792	2		T790	2		T804	1
values[107]	82	1			T792	1		T790	2		T804	2
values[108]	76	1			T792	1		T790	5		T804	2
values[109]	77	1			T792	6		T790	2		T804	1
values[110]	80	1			T792	1		T790	4		T804	4
values[111]	106	1			T792	1		T790	5		T804	3
values[112]	79	1			T792	1		T790	2		T804	4
values[113]	73	1			T792	3		T790	3		T804	3
values[114]	93	1			T792	1		T790	3		T804	4
values[115]	82	1			T792	1		T790	6		T804	2
values[116]	94	1			T792	1		T790	3		T804	1
values[117]	82	1			T792	2		T790	2		T804	2
values[118]	81	1			T792	3		T790	5		T804	1
values[119]	66	1			T792	1		T790	3		T804	2
values[120]	83	1			T792	2		T790	2		T804	3
values[121]	79	1			T792	1		T790	6		T804	2
values[122]	62	1			T792	1		T790	2		T804	2
values[123]	62	1			T792	3		T790	2		T804	2
values[124]	77	1			T792	1		T790	6		T804	1
values[125]	92	1			T792	1		T790	2		T804	1
values[126]	190	1			T792	2		T790	6		T804	4
values[127]	847	1			T792	38		T790	75		T804	33
values[128]	6196	1			T792	364		T790	654		T804	372