Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rom_ctrl__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	148379	1			T75	83		T77	7		T79	107
values[2]	3740	1			T79	9		T492	1		T448	1
values[3]	1766	1			T79	1		T514	1		T515	1
values[4]	1370	1			T516	18		T490	28		T526	37
values[5]	1059	1			T516	9		T490	26		T526	25
values[6]	1071	1			T516	12		T490	39		T526	20
values[7]	1015	1			T516	11		T490	33		T526	12
values[8]	908	1			T516	10		T490	27		T526	1
values[9]	844	1			T516	21		T490	20		T797	1
values[10]	848	1			T516	37		T490	17		T797	1
values[11]	762	1			T516	47		T490	23		T797	1
values[12]	644	1			T516	24		T490	31		T797	1
values[13]	507	1			T516	14		T490	27		T797	1
values[14]	545	1			T516	4		T490	26		T797	1
values[15]	470	1			T516	1		T490	28		T797	1
values[16]	427	1			T490	21		T797	1		T527	66
values[17]	351	1			T490	35		T797	1		T527	56
values[18]	295	1			T490	12		T797	1		T527	60
values[19]	238	1			T797	1		T527	29		T798	2
values[20]	186	1			T797	1		T527	10		T798	2
values[21]	176	1			T797	1		T527	14		T798	2
values[22]	163	1			T797	1		T527	8		T798	2
values[23]	207	1			T797	1		T527	9		T798	2
values[24]	204	1			T797	1		T527	11		T798	2
values[25]	198	1			T797	1		T527	2		T798	2
values[26]	198	1			T797	1		T798	2		T806	2
values[27]	171	1			T797	1		T798	2		T806	2
values[28]	199	1			T797	1		T798	2		T806	2
values[29]	207	1			T797	1		T798	2		T806	2
values[30]	137	1			T797	1		T798	2		T806	2
values[31]	157	1			T797	1		T798	2		T806	2
values[32]	140	1			T797	1		T798	2		T806	2
values[33]	127	1			T797	1		T798	2		T806	2
values[34]	103	1			T797	1		T798	2		T806	2
values[35]	84	1			T797	1		T798	2		T806	2
values[36]	69	1			T797	1		T798	2		T806	2
values[37]	74	1			T797	1		T798	2		T806	2
values[38]	58	1			T797	1		T798	2		T806	2
values[39]	67	1			T797	1		T798	2		T806	3
values[40]	66	1			T797	1		T798	2		T806	2
values[41]	67	1			T797	1		T798	2		T806	2
values[42]	82	1			T797	1		T798	2		T806	2
values[43]	64	1			T797	1		T798	2		T806	3
values[44]	86	1			T797	1		T798	2		T806	2
values[45]	73	1			T797	1		T798	2		T806	2
values[46]	100	1			T797	1		T798	2		T806	2
values[47]	78	1			T797	1		T798	2		T806	2
values[48]	73	1			T797	1		T798	2		T806	2
values[49]	73	1			T797	1		T798	2		T806	2
values[50]	73	1			T797	1		T798	2		T806	2
values[51]	48	1			T797	1		T798	2		T806	2
values[52]	64	1			T797	1		T798	2		T806	2
values[53]	71	1			T797	1		T798	2		T806	2
values[54]	72	1			T797	1		T798	2		T806	2
values[55]	97	1			T797	1		T798	2		T806	2
values[56]	103	1			T797	1		T798	2		T806	2
values[57]	79	1			T797	1		T798	2		T806	2
values[58]	56	1			T797	1		T798	2		T806	2
values[59]	54	1			T797	1		T798	2		T806	2
values[60]	60	1			T797	1		T798	2		T806	2
values[61]	53	1			T797	1		T798	2		T806	2
values[62]	40	1			T797	1		T798	2		T806	2
values[63]	38	1			T797	1		T798	2		T806	2
values[64]	37	1			T797	1		T798	2		T806	2
values[65]	46	1			T797	1		T798	2		T806	2
values[66]	56	1			T797	1		T798	2		T806	2
values[67]	44	1			T797	1		T798	2		T806	2
values[68]	43	1			T797	1		T798	2		T806	2
values[69]	36	1			T797	1		T798	2		T806	2
values[70]	42	1			T797	1		T798	2		T806	2
values[71]	60	1			T797	1		T798	2		T806	2
values[72]	42	1			T797	1		T798	2		T806	2
values[73]	46	1			T797	1		T798	2		T806	2
values[74]	46	1			T797	1		T798	2		T806	2
values[75]	47	1			T797	1		T798	2		T806	2
values[76]	46	1			T797	1		T798	3		T806	2
values[77]	45	1			T797	1		T798	2		T806	3
values[78]	46	1			T797	1		T798	2		T806	2
values[79]	46	1			T797	1		T798	2		T806	2
values[80]	43	1			T797	1		T798	2		T806	2
values[81]	64	1			T797	1		T798	2		T806	5
values[82]	46	1			T797	1		T798	2		T806	2
values[83]	63	1			T797	1		T798	2		T806	14
values[84]	63	1			T797	1		T798	2		T806	2
values[85]	51	1			T797	1		T798	2		T806	3
values[86]	59	1			T797	1		T798	2		T806	6
values[87]	71	1			T797	1		T798	2		T806	6
values[88]	53	1			T797	1		T798	2		T806	2
values[89]	62	1			T797	1		T798	2		T806	2
values[90]	73	1			T797	1		T798	2		T806	3
values[91]	66	1			T797	1		T798	2		T806	3
values[92]	74	1			T797	2		T798	2		T806	4
values[93]	73	1			T797	1		T798	2		T806	2
values[94]	62	1			T797	1		T798	2		T806	3
values[95]	57	1			T797	1		T798	2		T806	3
values[96]	69	1			T797	1		T798	2		T806	6
values[97]	69	1			T797	1		T798	3		T806	9
values[98]	60	1			T797	1		T798	5		T806	7
values[99]	66	1			T797	1		T798	2		T806	12
values[100]	85	1			T797	1		T798	4		T806	11
values[101]	87	1			T797	1		T798	3		T806	5
values[102]	78	1			T797	1		T798	4		T806	9
values[103]	72	1			T797	1		T798	6		T806	4
values[104]	82	1			T797	1		T798	5		T806	6
values[105]	97	1			T797	1		T798	6		T806	4
values[106]	97	1			T797	1		T798	6		T806	6
values[107]	67	1			T797	1		T798	4		T806	4
values[108]	83	1			T797	1		T798	4		T806	8
values[109]	81	1			T797	1		T798	5		T806	5
values[110]	82	1			T797	1		T798	3		T806	3
values[111]	70	1			T797	1		T798	2		T806	5
values[112]	73	1			T797	1		T798	2		T806	4
values[113]	73	1			T797	1		T798	3		T806	6
values[114]	68	1			T797	1		T798	3		T806	4
values[115]	73	1			T797	1		T798	4		T806	5
values[116]	55	1			T797	1		T798	4		T806	3
values[117]	69	1			T797	1		T798	3		T806	3
values[118]	93	1			T797	2		T798	5		T806	5
values[119]	71	1			T797	1		T798	2		T806	3
values[120]	49	1			T797	2		T798	2		T806	3
values[121]	63	1			T797	2		T798	5		T806	5
values[122]	65	1			T797	2		T798	4		T806	2
values[123]	79	1			T797	5		T798	9		T806	2
values[124]	102	1			T797	5		T798	6		T806	9
values[125]	200	1			T797	7		T798	4		T806	7
values[126]	437	1			T797	33		T798	39		T806	21
values[127]	1959	1			T797	110		T798	349		T806	209
values[128]	3461	1			T797	192		T798	446		T806	455