Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_host1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	139497	1			T75	71		T77	5		T79	89
values[2]	9057	1			T79	11		T401	3		T518	1
values[3]	4070	1			T79	1		T480	2		T519	2
values[4]	2383	1			T429	17		T430	1		T613	51
values[5]	1444	1			T429	20		T430	1		T613	51
values[6]	1049	1			T429	17		T430	1		T613	33
values[7]	843	1			T429	20		T430	1		T613	36
values[8]	767	1			T429	5		T430	1		T613	12
values[9]	659	1			T429	12		T430	1		T613	2
values[10]	642	1			T429	12		T430	1		T564	10
values[11]	609	1			T429	7		T430	1		T564	7
values[12]	559	1			T429	12		T430	1		T564	9
values[13]	523	1			T429	12		T430	1		T564	12
values[14]	600	1			T429	24		T430	1		T564	5
values[15]	594	1			T429	7		T430	1		T564	14
values[16]	459	1			T429	6		T430	1		T564	16
values[17]	473	1			T429	8		T430	1		T564	14
values[18]	459	1			T429	9		T430	1		T564	5
values[19]	491	1			T429	10		T430	1		T564	16
values[20]	520	1			T429	6		T430	1		T564	15
values[21]	561	1			T429	3		T430	1		T564	4
values[22]	441	1			T429	5		T430	1		T564	4
values[23]	483	1			T429	14		T430	1		T564	7
values[24]	345	1			T429	4		T430	1		T564	5
values[25]	345	1			T429	4		T430	1		T797	2
values[26]	359	1			T429	8		T430	1		T797	2
values[27]	394	1			T429	8		T430	1		T797	2
values[28]	347	1			T429	10		T430	1		T797	2
values[29]	345	1			T429	4		T430	1		T797	2
values[30]	345	1			T429	4		T430	1		T797	2
values[31]	377	1			T429	5		T430	1		T797	2
values[32]	370	1			T429	4		T430	1		T797	2
values[33]	359	1			T429	3		T430	1		T797	2
values[34]	317	1			T429	8		T430	1		T797	2
values[35]	313	1			T429	4		T430	1		T797	2
values[36]	327	1			T429	3		T430	1		T797	2
values[37]	295	1			T429	2		T430	1		T797	2
values[38]	316	1			T429	1		T430	1		T797	2
values[39]	280	1			T430	1		T797	2		T794	9
values[40]	286	1			T430	1		T797	2		T794	5
values[41]	338	1			T430	1		T797	2		T794	7
values[42]	285	1			T430	1		T797	2		T794	5
values[43]	254	1			T430	1		T797	2		T794	16
values[44]	235	1			T430	1		T797	2		T794	7
values[45]	192	1			T430	1		T797	2		T794	7
values[46]	229	1			T430	1		T797	2		T794	6
values[47]	210	1			T430	1		T797	2		T794	23
values[48]	181	1			T430	1		T797	2		T794	17
values[49]	187	1			T430	1		T797	2		T794	13
values[50]	191	1			T430	1		T797	2		T794	16
values[51]	172	1			T430	1		T797	2		T794	18
values[52]	129	1			T430	1		T797	2		T794	11
values[53]	133	1			T430	1		T797	2		T501	10
values[54]	128	1			T430	1		T797	2		T501	11
values[55]	109	1			T430	1		T797	2		T501	4
values[56]	112	1			T430	1		T797	2		T501	10
values[57]	107	1			T430	1		T797	2		T501	7
values[58]	77	1			T430	1		T797	2		T501	4
values[59]	75	1			T430	1		T797	2		T501	9
values[60]	66	1			T430	1		T797	2		T487	1
values[61]	84	1			T430	1		T797	2		T487	1
values[62]	76	1			T430	1		T797	2		T487	1
values[63]	120	1			T430	1		T797	2		T487	1
values[64]	106	1			T430	1		T797	2		T487	1
values[65]	71	1			T430	1		T797	2		T487	1
values[66]	71	1			T430	2		T797	2		T487	1
values[67]	87	1			T430	1		T797	2		T487	1
values[68]	89	1			T430	1		T797	2		T487	1
values[69]	84	1			T430	1		T797	2		T487	1
values[70]	113	1			T430	1		T797	3		T487	1
values[71]	102	1			T430	1		T797	2		T487	1
values[72]	114	1			T430	1		T797	2		T487	1
values[73]	106	1			T430	1		T797	2		T487	1
values[74]	105	1			T430	1		T797	2		T487	1
values[75]	121	1			T430	1		T797	2		T487	1
values[76]	126	1			T430	1		T797	2		T487	1
values[77]	122	1			T430	1		T797	2		T487	1
values[78]	105	1			T430	1		T797	2		T487	1
values[79]	116	1			T430	1		T797	2		T487	1
values[80]	129	1			T430	1		T797	2		T487	1
values[81]	95	1			T430	1		T797	5		T487	1
values[82]	105	1			T430	1		T797	3		T487	1
values[83]	109	1			T430	1		T797	2		T487	1
values[84]	128	1			T430	1		T797	2		T487	1
values[85]	132	1			T430	1		T797	3		T487	1
values[86]	105	1			T430	1		T797	4		T487	1
values[87]	108	1			T430	1		T797	4		T487	1
values[88]	75	1			T430	1		T797	5		T487	1
values[89]	66	1			T430	1		T797	3		T487	2
values[90]	66	1			T430	1		T797	5		T487	1
values[91]	70	1			T430	1		T797	6		T487	7
values[92]	68	1			T430	1		T797	2		T487	1
values[93]	52	1			T430	1		T797	3		T487	2
values[94]	79	1			T430	1		T797	9		T487	3
values[95]	75	1			T430	1		T797	3		T487	8
values[96]	72	1			T430	1		T797	3		T487	6
values[97]	59	1			T430	1		T797	4		T487	1
values[98]	50	1			T430	1		T797	2		T487	3
values[99]	50	1			T430	1		T797	4		T487	2
values[100]	41	1			T430	1		T797	2		T487	1
values[101]	47	1			T430	1		T797	2		T487	3
values[102]	42	1			T430	1		T797	4		T487	2
values[103]	49	1			T430	1		T797	3		T487	1
values[104]	42	1			T430	1		T797	2		T487	1
values[105]	40	1			T430	1		T797	2		T487	1
values[106]	48	1			T430	1		T797	4		T487	3
values[107]	62	1			T430	1		T797	2		T487	6
values[108]	60	1			T430	1		T797	2		T487	4
values[109]	49	1			T430	1		T797	2		T487	5
values[110]	34	1			T430	1		T797	3		T487	2
values[111]	38	1			T430	1		T797	3		T487	1
values[112]	49	1			T430	1		T797	8		T487	1
values[113]	34	1			T430	1		T797	4		T487	1
values[114]	41	1			T430	1		T797	5		T487	3
values[115]	37	1			T430	3		T797	2		T487	2
values[116]	30	1			T430	1		T797	2		T487	1
values[117]	34	1			T430	4		T797	3		T487	2
values[118]	39	1			T430	2		T797	5		T487	3
values[119]	52	1			T430	3		T797	6		T487	2
values[120]	47	1			T430	6		T797	3		T487	2
values[121]	47	1			T430	1		T797	4		T487	2
values[122]	38	1			T430	1		T797	7		T487	1
values[123]	24	1			T430	1		T797	3		T487	2
values[124]	30	1			T430	3		T797	2		T487	3
values[125]	36	1			T430	1		T797	8		T487	1
values[126]	77	1			T430	2		T797	6		T487	7
values[127]	950	1			T430	74		T797	114		T487	68
values[128]	4219	1			T430	342		T797	512		T487	280