Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	137606	1			T75	58		T77	5		T79	96
values[2]	10894	1			T79	5		T401	1		T409	1
values[3]	4846	1			T810	1		T785	5		T490	101
values[4]	2828	1			T785	3		T490	58		T800	8
values[5]	1818	1			T785	1		T490	20		T800	2
values[6]	1296	1			T785	1		T490	14		T800	8
values[7]	897	1			T785	4		T800	3		T429	53
values[8]	637	1			T785	3		T800	4		T429	51
values[9]	410	1			T785	1		T800	7		T429	13
values[10]	386	1			T785	6		T800	19		T429	8
values[11]	295	1			T785	9		T800	3		T429	4
values[12]	274	1			T785	6		T800	6		T430	1
values[13]	302	1			T785	2		T800	11		T430	1
values[14]	259	1			T785	1		T800	6		T430	1
values[15]	206	1			T785	5		T800	3		T430	1
values[16]	204	1			T785	2		T800	4		T430	1
values[17]	234	1			T785	2		T800	8		T430	1
values[18]	226	1			T785	3		T800	13		T430	2
values[19]	233	1			T785	2		T800	7		T430	1
values[20]	228	1			T785	1		T800	7		T430	1
values[21]	220	1			T785	6		T800	5		T430	1
values[22]	191	1			T785	5		T800	4		T430	1
values[23]	196	1			T785	2		T800	9		T430	1
values[24]	195	1			T785	8		T800	11		T430	1
values[25]	208	1			T785	9		T800	15		T430	1
values[26]	206	1			T785	6		T800	4		T430	1
values[27]	166	1			T785	1		T800	4		T430	1
values[28]	224	1			T785	2		T800	6		T430	1
values[29]	221	1			T785	11		T800	3		T430	1
values[30]	190	1			T785	5		T800	3		T430	1
values[31]	196	1			T785	2		T800	3		T430	1
values[32]	150	1			T785	1		T800	10		T430	1
values[33]	205	1			T785	4		T800	7		T430	1
values[34]	218	1			T785	1		T800	18		T430	1
values[35]	196	1			T785	3		T800	9		T430	1
values[36]	207	1			T785	2		T800	3		T430	1
values[37]	196	1			T785	2		T800	4		T430	1
values[38]	202	1			T785	2		T800	10		T430	1
values[39]	201	1			T785	5		T800	4		T430	1
values[40]	164	1			T785	1		T800	4		T430	1
values[41]	200	1			T785	4		T800	4		T430	1
values[42]	177	1			T785	4		T800	6		T430	1
values[43]	178	1			T785	12		T800	8		T430	1
values[44]	178	1			T785	6		T800	9		T430	1
values[45]	208	1			T785	2		T800	5		T430	1
values[46]	188	1			T785	7		T800	7		T430	1
values[47]	184	1			T785	4		T800	9		T430	1
values[48]	188	1			T785	5		T800	14		T430	1
values[49]	147	1			T785	2		T800	2		T430	1
values[50]	182	1			T785	3		T800	7		T430	1
values[51]	186	1			T785	6		T800	4		T430	1
values[52]	178	1			T785	12		T800	12		T430	1
values[53]	147	1			T785	2		T800	3		T430	1
values[54]	187	1			T785	8		T800	9		T430	1
values[55]	159	1			T785	1		T800	3		T430	1
values[56]	157	1			T785	1		T800	8		T430	1
values[57]	132	1			T785	3		T800	6		T430	1
values[58]	128	1			T785	2		T800	8		T430	1
values[59]	115	1			T785	1		T800	8		T430	1
values[60]	114	1			T785	3		T800	5		T430	1
values[61]	107	1			T785	2		T800	5		T430	1
values[62]	118	1			T785	3		T800	4		T430	1
values[63]	134	1			T785	4		T800	14		T430	1
values[64]	121	1			T785	2		T800	3		T430	1
values[65]	118	1			T785	4		T800	8		T430	1
values[66]	151	1			T785	2		T800	10		T430	1
values[67]	111	1			T785	3		T800	6		T430	1
values[68]	136	1			T785	1		T800	10		T430	2
values[69]	134	1			T785	3		T800	8		T430	1
values[70]	147	1			T785	6		T800	4		T430	1
values[71]	170	1			T785	9		T800	10		T430	1
values[72]	165	1			T785	10		T800	13		T430	1
values[73]	188	1			T785	16		T430	1		T797	1
values[74]	159	1			T785	7		T430	1		T797	1
values[75]	146	1			T785	7		T430	1		T797	1
values[76]	153	1			T785	8		T430	1		T797	1
values[77]	122	1			T785	5		T430	1		T797	1
values[78]	112	1			T785	1		T430	1		T797	1
values[79]	138	1			T785	5		T430	1		T797	1
values[80]	151	1			T785	6		T430	1		T797	1
values[81]	138	1			T785	14		T430	1		T797	2
values[82]	121	1			T785	6		T430	1		T797	1
values[83]	114	1			T785	13		T430	1		T797	1
values[84]	111	1			T785	7		T430	1		T797	1
values[85]	125	1			T785	3		T430	1		T797	1
values[86]	115	1			T785	4		T430	1		T797	1
values[87]	132	1			T785	6		T430	1		T797	1
values[88]	118	1			T785	8		T430	1		T797	1
values[89]	111	1			T785	14		T430	1		T797	1
values[90]	141	1			T785	5		T430	1		T797	1
values[91]	104	1			T785	6		T430	1		T797	1
values[92]	108	1			T785	4		T430	1		T797	1
values[93]	123	1			T785	4		T430	1		T797	1
values[94]	120	1			T430	1		T797	1		T795	4
values[95]	112	1			T430	1		T797	1		T795	2
values[96]	111	1			T430	1		T797	1		T795	4
values[97]	113	1			T430	1		T797	1		T795	2
values[98]	119	1			T430	1		T797	1		T795	6
values[99]	109	1			T430	1		T797	1		T795	8
values[100]	88	1			T430	1		T797	1		T795	6
values[101]	95	1			T430	1		T797	1		T795	6
values[102]	95	1			T430	1		T797	1		T795	5
values[103]	90	1			T430	1		T797	1		T795	8
values[104]	107	1			T430	1		T797	1		T795	11
values[105]	125	1			T430	1		T797	1		T795	8
values[106]	103	1			T430	1		T797	1		T795	4
values[107]	78	1			T430	1		T797	1		T795	2
values[108]	84	1			T430	1		T797	1		T795	1
values[109]	85	1			T430	1		T797	1		T795	2
values[110]	75	1			T430	1		T797	1		T795	5
values[111]	94	1			T430	1		T797	1		T795	4
values[112]	95	1			T430	5		T797	1		T795	7
values[113]	78	1			T430	1		T797	1		T795	3
values[114]	74	1			T430	1		T797	1		T795	3
values[115]	56	1			T430	1		T797	1		T795	5
values[116]	82	1			T430	4		T797	1		T795	5
values[117]	70	1			T430	2		T797	1		T795	4
values[118]	68	1			T430	1		T797	1		T795	6
values[119]	79	1			T430	1		T797	1		T795	10
values[120]	74	1			T430	1		T797	1		T795	7
values[121]	64	1			T430	2		T797	1		T795	9
values[122]	82	1			T430	2		T797	1		T795	4
values[123]	79	1			T430	1		T797	1		T795	8
values[124]	90	1			T430	1		T797	3		T795	4
values[125]	87	1			T430	3		T797	4		T799	2
values[126]	84	1			T430	2		T797	4		T799	1
values[127]	814	1			T430	37		T797	38		T799	30
values[128]	7811	1			T430	379		T797	308		T799	340