Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	131999	1			T75	425		T76	6		T79	564
values[2]	8999	1			T75	1		T76	1		T79	91
values[3]	3513	1			T79	37		T249	24		T475	52
values[4]	2200	1			T79	24		T249	18		T475	28
values[5]	1422	1			T79	18		T249	4		T475	1
values[6]	993	1			T79	13		T249	11		T477	4
values[7]	731	1			T79	4		T249	9		T477	3
values[8]	638	1			T79	5		T249	4		T477	6
values[9]	527	1			T79	7		T249	2		T477	10
values[10]	492	1			T79	3		T249	6		T477	11
values[11]	441	1			T249	16		T477	2		T643	6
values[12]	393	1			T249	5		T477	11		T643	6
values[13]	427	1			T477	10		T643	10		T508	2
values[14]	335	1			T477	6		T643	8		T508	3
values[15]	426	1			T477	5		T643	7		T508	3
values[16]	390	1			T477	17		T643	12		T508	2
values[17]	399	1			T477	5		T643	7		T508	2
values[18]	331	1			T477	6		T643	4		T508	3
values[19]	315	1			T477	11		T643	4		T508	4
values[20]	335	1			T477	9		T643	7		T508	3
values[21]	382	1			T477	10		T643	7		T508	1
values[22]	403	1			T477	6		T643	4		T508	5
values[23]	363	1			T477	3		T643	8		T508	5
values[24]	295	1			T477	5		T643	4		T508	2
values[25]	386	1			T477	3		T643	16		T508	2
values[26]	338	1			T477	3		T643	5		T508	2
values[27]	332	1			T477	13		T643	9		T508	1
values[28]	308	1			T477	15		T643	9		T508	1
values[29]	331	1			T477	5		T643	6		T508	1
values[30]	352	1			T477	4		T643	5		T508	2
values[31]	373	1			T477	4		T643	4		T508	2
values[32]	322	1			T477	7		T643	5		T508	1
values[33]	323	1			T477	6		T643	7		T508	1
values[34]	353	1			T477	7		T643	8		T508	3
values[35]	357	1			T477	13		T643	6		T508	1
values[36]	321	1			T477	22		T643	2		T508	3
values[37]	338	1			T477	9		T643	8		T508	4
values[38]	358	1			T477	5		T643	7		T508	4
values[39]	356	1			T477	14		T643	5		T508	1
values[40]	292	1			T477	7		T643	7		T508	1
values[41]	360	1			T477	3		T643	9		T508	2
values[42]	312	1			T477	13		T643	8		T508	2
values[43]	290	1			T477	6		T643	9		T508	2
values[44]	335	1			T477	10		T643	9		T508	1
values[45]	295	1			T477	2		T643	6		T508	1
values[46]	313	1			T477	7		T643	11		T508	3
values[47]	319	1			T477	13		T643	12		T508	5
values[48]	312	1			T477	3		T643	9		T508	2
values[49]	321	1			T477	5		T643	7		T508	6
values[50]	304	1			T477	9		T643	7		T508	8
values[51]	319	1			T477	8		T643	6		T508	3
values[52]	313	1			T477	1		T643	4		T508	5
values[53]	299	1			T643	6		T508	4		T489	21
values[54]	261	1			T643	4		T508	2		T489	17
values[55]	239	1			T643	10		T508	2		T489	10
values[56]	229	1			T643	14		T508	2		T489	7
values[57]	217	1			T643	13		T508	7		T489	6
values[58]	237	1			T643	15		T508	3		T489	8
values[59]	224	1			T643	6		T508	1		T489	7
values[60]	196	1			T643	11		T508	2		T489	10
values[61]	216	1			T643	10		T508	2		T489	9
values[62]	176	1			T643	4		T508	3		T489	18
values[63]	181	1			T508	4		T489	14		T485	1
values[64]	184	1			T508	1		T489	13		T485	1
values[65]	150	1			T508	1		T489	14		T485	1
values[66]	160	1			T508	3		T489	17		T485	1
values[67]	119	1			T508	4		T489	17		T485	1
values[68]	142	1			T508	1		T489	32		T485	1
values[69]	119	1			T508	1		T489	2		T485	1
values[70]	79	1			T508	2		T489	3		T485	1
values[71]	81	1			T508	1		T485	1		T488	1
values[72]	81	1			T508	2		T485	1		T488	2
values[73]	77	1			T508	5		T485	1		T488	3
values[74]	71	1			T508	6		T485	1		T488	2
values[75]	63	1			T508	9		T485	1		T488	2
values[76]	78	1			T508	9		T485	1		T488	1
values[77]	55	1			T508	3		T485	1		T488	2
values[78]	71	1			T508	3		T485	1		T488	3
values[79]	60	1			T508	12		T485	1		T488	2
values[80]	70	1			T508	6		T485	1		T488	9
values[81]	83	1			T508	5		T485	1		T488	9
values[82]	74	1			T508	8		T485	3		T488	8
values[83]	86	1			T508	11		T485	8		T488	5
values[84]	82	1			T508	8		T485	4		T488	5
values[85]	58	1			T508	6		T485	2		T488	6
values[86]	63	1			T508	5		T485	1		T488	1
values[87]	90	1			T508	3		T485	4		T488	4
values[88]	67	1			T508	5		T485	1		T488	3
values[89]	75	1			T508	5		T485	9		T488	2
values[90]	71	1			T508	4		T485	8		T488	1
values[91]	79	1			T508	3		T485	2		T488	1
values[92]	66	1			T508	11		T485	3		T488	2
values[93]	73	1			T508	10		T485	3		T488	1
values[94]	59	1			T508	3		T485	3		T488	5
values[95]	79	1			T508	2		T485	10		T488	10
values[96]	54	1			T508	3		T485	2		T488	2
values[97]	53	1			T508	1		T485	1		T488	4
values[98]	64	1			T485	3		T488	5		T524	5
values[99]	52	1			T485	1		T488	4		T524	3
values[100]	59	1			T485	8		T488	4		T524	2
values[101]	65	1			T485	2		T488	2		T524	4
values[102]	77	1			T485	2		T488	4		T524	4
values[103]	55	1			T485	1		T488	6		T524	4
values[104]	51	1			T485	1		T488	4		T524	2
values[105]	50	1			T485	1		T488	5		T524	3
values[106]	47	1			T485	4		T488	2		T524	3
values[107]	40	1			T485	1		T488	2		T524	2
values[108]	40	1			T485	2		T488	1		T524	2
values[109]	34	1			T485	2		T488	4		T524	2
values[110]	42	1			T485	3		T488	8		T524	4
values[111]	55	1			T485	3		T488	7		T524	6
values[112]	51	1			T485	2		T488	9		T524	3
values[113]	39	1			T485	1		T488	1		T524	5
values[114]	48	1			T485	1		T488	2		T524	2
values[115]	59	1			T485	4		T488	3		T524	2
values[116]	33	1			T485	1		T488	4		T524	2
values[117]	39	1			T485	1		T488	7		T524	3
values[118]	43	1			T485	2		T488	8		T524	3
values[119]	39	1			T485	2		T488	2		T524	3
values[120]	41	1			T485	2		T488	4		T524	2
values[121]	40	1			T485	3		T488	4		T524	3
values[122]	40	1			T485	1		T488	3		T524	7
values[123]	40	1			T485	1		T488	3		T524	4
values[124]	49	1			T485	1		T488	4		T524	3
values[125]	73	1			T485	1		T488	10		T524	2
values[126]	111	1			T485	2		T488	3		T524	4
values[127]	609	1			T485	25		T488	6		T524	73
values[128]	5407	1			T485	256		T488	2		T524	656