Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rom_ctrl__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	155999	1			T75	980		T76	8		T79	233
values[2]	4344	1			T239	1		T240	3		T558	42
values[3]	2265	1			T558	28		T475	83		T692	30
values[4]	1676	1			T558	30		T475	51		T692	29
values[5]	1220	1			T558	31		T475	42		T692	36
values[6]	1004	1			T558	38		T475	17		T692	38
values[7]	889	1			T558	50		T475	6		T692	60
values[8]	844	1			T558	66		T692	50		T482	4
values[9]	798	1			T558	54		T692	58		T482	5
values[10]	734	1			T558	38		T692	41		T482	5
values[11]	591	1			T558	23		T692	38		T482	3
values[12]	581	1			T558	6		T692	18		T482	5
values[13]	595	1			T692	11		T482	2		T508	5
values[14]	562	1			T692	17		T482	1		T508	19
values[15]	515	1			T692	25		T482	1		T508	25
values[16]	503	1			T692	15		T482	4		T508	16
values[17]	475	1			T482	3		T508	30		T595	3
values[18]	419	1			T482	1		T508	18		T595	2
values[19]	364	1			T482	3		T508	3		T595	2
values[20]	287	1			T482	1		T508	5		T595	1
values[21]	291	1			T482	2		T508	7		T595	4
values[22]	275	1			T482	5		T508	12		T595	6
values[23]	261	1			T482	6		T508	16		T595	4
values[24]	233	1			T482	1		T508	5		T595	5
values[25]	225	1			T482	1		T508	7		T595	6
values[26]	267	1			T482	2		T508	5		T595	9
values[27]	226	1			T482	2		T508	5		T595	4
values[28]	244	1			T482	4		T508	4		T595	8
values[29]	252	1			T482	3		T508	3		T595	12
values[30]	209	1			T482	6		T595	10		T852	1
values[31]	160	1			T482	3		T595	25		T852	1
values[32]	212	1			T482	12		T595	59		T852	1
values[33]	196	1			T482	5		T595	57		T852	1
values[34]	144	1			T482	3		T595	42		T852	1
values[35]	94	1			T482	2		T595	31		T852	1
values[36]	85	1			T482	3		T595	23		T852	1
values[37]	96	1			T482	2		T595	24		T852	1
values[38]	74	1			T482	3		T595	11		T852	1
values[39]	71	1			T482	1		T595	9		T852	1
values[40]	89	1			T482	4		T595	13		T852	1
values[41]	80	1			T482	6		T595	9		T852	1
values[42]	68	1			T482	2		T595	4		T852	1
values[43]	60	1			T482	2		T852	1		T855	1
values[44]	64	1			T482	1		T852	1		T855	1
values[45]	56	1			T482	2		T852	1		T855	1
values[46]	55	1			T482	2		T852	1		T855	1
values[47]	55	1			T482	1		T852	1		T855	1
values[48]	71	1			T482	4		T852	1		T855	1
values[49]	85	1			T482	7		T852	1		T855	1
values[50]	66	1			T482	2		T852	1		T855	1
values[51]	62	1			T482	1		T852	1		T855	1
values[52]	50	1			T482	2		T852	1		T855	1
values[53]	42	1			T482	3		T852	1		T855	1
values[54]	46	1			T482	3		T852	1		T855	1
values[55]	49	1			T482	4		T852	1		T855	1
values[56]	45	1			T482	4		T852	1		T855	1
values[57]	41	1			T482	2		T852	1		T855	1
values[58]	51	1			T482	1		T852	1		T855	1
values[59]	52	1			T482	3		T852	1		T855	1
values[60]	47	1			T482	4		T852	1		T855	1
values[61]	49	1			T482	5		T852	1		T855	1
values[62]	41	1			T482	3		T852	1		T855	1
values[63]	46	1			T482	2		T852	1		T855	1
values[64]	41	1			T482	1		T852	1		T855	1
values[65]	46	1			T482	2		T852	1		T855	1
values[66]	53	1			T482	4		T852	1		T855	1
values[67]	52	1			T482	5		T852	1		T855	1
values[68]	46	1			T482	2		T852	1		T855	1
values[69]	49	1			T482	5		T852	1		T855	1
values[70]	46	1			T482	1		T852	1		T855	1
values[71]	62	1			T482	3		T852	1		T855	1
values[72]	66	1			T482	6		T852	1		T855	1
values[73]	60	1			T482	3		T852	1		T855	1
values[74]	73	1			T482	4		T852	1		T855	1
values[75]	53	1			T482	1		T852	1		T855	1
values[76]	51	1			T482	1		T852	1		T855	1
values[77]	58	1			T482	3		T852	1		T855	1
values[78]	60	1			T482	2		T852	1		T855	1
values[79]	63	1			T482	4		T852	1		T855	1
values[80]	59	1			T482	1		T852	1		T855	1
values[81]	75	1			T482	3		T852	1		T855	1
values[82]	91	1			T482	7		T852	1		T855	1
values[83]	66	1			T482	6		T852	1		T855	1
values[84]	80	1			T482	6		T852	1		T855	1
values[85]	72	1			T482	3		T852	1		T855	1
values[86]	83	1			T482	4		T852	1		T855	1
values[87]	76	1			T482	6		T852	1		T855	1
values[88]	79	1			T482	2		T852	1		T855	1
values[89]	66	1			T482	1		T852	1		T855	1
values[90]	70	1			T482	3		T852	1		T855	1
values[91]	79	1			T482	1		T852	1		T855	2
values[92]	94	1			T482	4		T852	1		T855	1
values[93]	89	1			T482	2		T852	1		T855	1
values[94]	71	1			T482	3		T852	1		T855	1
values[95]	71	1			T482	2		T852	1		T855	1
values[96]	79	1			T482	2		T852	1		T855	1
values[97]	78	1			T482	1		T852	1		T855	1
values[98]	97	1			T482	2		T852	1		T855	1
values[99]	79	1			T482	5		T852	1		T855	1
values[100]	77	1			T482	1		T852	1		T855	1
values[101]	68	1			T482	1		T852	1		T855	1
values[102]	67	1			T482	2		T852	3		T855	1
values[103]	81	1			T482	4		T852	6		T855	1
values[104]	91	1			T482	2		T852	2		T855	1
values[105]	67	1			T482	2		T852	1		T855	1
values[106]	95	1			T482	1		T852	4		T855	1
values[107]	97	1			T482	3		T852	1		T855	1
values[108]	77	1			T482	1		T852	2		T855	1
values[109]	78	1			T482	1		T852	1		T855	1
values[110]	73	1			T482	6		T852	4		T855	1
values[111]	84	1			T482	2		T852	3		T855	1
values[112]	83	1			T482	3		T852	1		T855	1
values[113]	84	1			T482	4		T852	2		T855	1
values[114]	102	1			T482	2		T852	2		T855	1
values[115]	91	1			T482	2		T852	3		T855	1
values[116]	98	1			T482	3		T852	1		T855	1
values[117]	104	1			T482	2		T852	2		T855	5
values[118]	95	1			T482	7		T852	1		T855	5
values[119]	89	1			T482	6		T852	2		T855	3
values[120]	99	1			T482	6		T852	2		T855	6
values[121]	88	1			T482	4		T852	3		T855	3
values[122]	82	1			T482	4		T852	1		T855	7
values[123]	97	1			T482	2		T852	3		T855	1
values[124]	170	1			T482	20		T852	3		T855	2
values[125]	317	1			T482	41		T852	1		T855	1
values[126]	652	1			T482	64		T852	14		T855	11
values[127]	2697	1			T482	38		T852	86		T855	97
values[128]	4948	1			T482	6		T852	235		T855	220