Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__core_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	151510	1			T74	118		T75	402		T76	5
values[2]	3816	1			T74	137		T79	1		T239	1
values[3]	1679	1			T74	105		T240	1		T475	64
values[4]	1303	1			T74	82		T475	67		T835	14
values[5]	1145	1			T74	92		T475	60		T835	21
values[6]	975	1			T74	61		T475	37		T835	28
values[7]	904	1			T74	49		T475	5		T835	30
values[8]	728	1			T74	43		T835	15		T841	1
values[9]	570	1			T74	31		T835	30		T841	1
values[10]	561	1			T74	27		T835	41		T841	1
values[11]	505	1			T74	21		T835	57		T841	1
values[12]	408	1			T74	9		T835	59		T841	1
values[13]	288	1			T74	30		T835	45		T841	1
values[14]	263	1			T74	28		T835	22		T841	1
values[15]	247	1			T74	15		T835	36		T841	1
values[16]	237	1			T74	17		T835	20		T841	1
values[17]	252	1			T74	13		T835	4		T841	1
values[18]	236	1			T74	9		T835	5		T841	1
values[19]	281	1			T74	5		T841	1		T843	1
values[20]	270	1			T74	10		T841	2		T843	1
values[21]	242	1			T74	23		T841	1		T843	1
values[22]	211	1			T74	17		T841	1		T843	1
values[23]	279	1			T74	47		T841	1		T843	1
values[24]	254	1			T74	18		T841	1		T843	1
values[25]	193	1			T74	19		T841	1		T843	1
values[26]	134	1			T74	13		T841	1		T843	1
values[27]	131	1			T74	4		T841	1		T843	1
values[28]	126	1			T74	2		T841	1		T843	1
values[29]	81	1			T74	1		T841	1		T843	1
values[30]	73	1			T841	1		T843	1		T846	8
values[31]	73	1			T841	1		T843	1		T846	12
values[32]	56	1			T841	1		T843	1		T846	13
values[33]	44	1			T841	1		T843	1		T846	1
values[34]	43	1			T841	1		T843	1		T485	1
values[35]	46	1			T841	1		T843	1		T485	1
values[36]	66	1			T841	1		T843	1		T485	1
values[37]	55	1			T841	1		T843	1		T485	1
values[38]	64	1			T841	1		T843	1		T485	1
values[39]	70	1			T841	1		T843	1		T485	1
values[40]	56	1			T841	1		T843	1		T485	1
values[41]	53	1			T841	1		T843	1		T485	1
values[42]	33	1			T841	1		T843	1		T485	1
values[43]	38	1			T841	1		T843	1		T485	1
values[44]	43	1			T841	1		T843	1		T485	1
values[45]	40	1			T841	1		T843	1		T485	1
values[46]	46	1			T841	1		T843	1		T485	1
values[47]	40	1			T841	1		T843	1		T485	2
values[48]	40	1			T841	1		T843	1		T485	1
values[49]	29	1			T841	1		T843	1		T485	1
values[50]	42	1			T841	1		T843	1		T485	1
values[51]	43	1			T841	1		T843	1		T485	1
values[52]	45	1			T841	1		T843	1		T485	1
values[53]	28	1			T841	1		T843	1		T485	1
values[54]	33	1			T841	1		T843	1		T485	1
values[55]	31	1			T841	1		T843	1		T485	1
values[56]	44	1			T841	1		T843	1		T485	1
values[57]	39	1			T841	1		T843	1		T485	1
values[58]	41	1			T841	1		T843	1		T485	1
values[59]	36	1			T841	1		T843	1		T485	1
values[60]	32	1			T841	1		T843	1		T485	1
values[61]	34	1			T841	1		T843	1		T485	1
values[62]	36	1			T841	1		T843	1		T485	1
values[63]	40	1			T841	1		T843	1		T485	1
values[64]	44	1			T841	1		T843	1		T485	1
values[65]	36	1			T841	1		T843	1		T485	1
values[66]	44	1			T841	1		T843	1		T485	1
values[67]	36	1			T841	1		T843	1		T485	1
values[68]	39	1			T841	1		T843	1		T485	1
values[69]	41	1			T841	1		T843	1		T485	2
values[70]	28	1			T841	1		T843	1		T485	1
values[71]	37	1			T841	1		T843	1		T485	1
values[72]	30	1			T841	1		T843	1		T485	1
values[73]	39	1			T841	1		T843	1		T485	2
values[74]	49	1			T841	1		T843	1		T485	5
values[75]	43	1			T841	1		T843	1		T485	7
values[76]	53	1			T841	1		T843	1		T485	8
values[77]	47	1			T841	1		T843	1		T485	7
values[78]	41	1			T841	1		T843	1		T485	4
values[79]	42	1			T841	1		T843	1		T485	3
values[80]	42	1			T841	1		T843	1		T485	3
values[81]	44	1			T841	1		T843	1		T485	4
values[82]	30	1			T841	1		T843	1		T485	3
values[83]	44	1			T841	1		T843	1		T485	2
values[84]	55	1			T841	1		T843	1		T485	5
values[85]	44	1			T841	1		T843	1		T485	4
values[86]	53	1			T841	1		T843	1		T485	2
values[87]	55	1			T841	1		T843	1		T485	1
values[88]	59	1			T841	1		T843	1		T485	2
values[89]	61	1			T841	1		T843	1		T485	4
values[90]	74	1			T841	1		T843	1		T485	4
values[91]	50	1			T841	1		T843	1		T485	2
values[92]	41	1			T841	1		T843	1		T485	2
values[93]	55	1			T841	1		T843	1		T485	5
values[94]	40	1			T841	1		T843	1		T485	3
values[95]	48	1			T841	1		T843	1		T485	1
values[96]	56	1			T841	1		T843	1		T485	2
values[97]	51	1			T841	1		T843	1		T485	2
values[98]	56	1			T841	1		T843	1		T485	7
values[99]	69	1			T841	1		T843	1		T485	4
values[100]	55	1			T841	1		T843	1		T485	3
values[101]	53	1			T841	1		T843	1		T485	2
values[102]	53	1			T841	1		T843	1		T485	4
values[103]	44	1			T841	1		T843	1		T485	2
values[104]	44	1			T841	1		T843	1		T485	2
values[105]	49	1			T841	1		T843	1		T485	1
values[106]	51	1			T841	1		T843	1		T485	2
values[107]	46	1			T841	1		T843	1		T485	2
values[108]	53	1			T841	1		T843	1		T485	2
values[109]	65	1			T841	1		T843	1		T485	2
values[110]	65	1			T841	1		T843	1		T485	1
values[111]	57	1			T841	1		T843	1		T485	1
values[112]	66	1			T841	1		T843	1		T485	2
values[113]	45	1			T841	1		T843	1		T485	1
values[114]	61	1			T841	1		T843	2		T485	2
values[115]	64	1			T841	1		T843	1		T485	3
values[116]	64	1			T841	1		T843	1		T485	1
values[117]	56	1			T841	1		T843	1		T485	1
values[118]	58	1			T841	1		T843	3		T485	4
values[119]	63	1			T841	1		T843	1		T485	5
values[120]	57	1			T841	1		T843	1		T485	2
values[121]	76	1			T841	1		T843	3		T485	3
values[122]	57	1			T841	2		T843	1		T485	3
values[123]	84	1			T841	1		T843	1		T485	4
values[124]	146	1			T841	1		T843	1		T485	5
values[125]	314	1			T841	2		T843	3		T485	1
values[126]	597	1			T841	9		T843	9		T485	13
values[127]	2017	1			T841	135		T843	87		T485	84
values[128]	3724	1			T841	273		T843	198		T485	174