Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__prim_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	160148	1			T70	2		T71	106		T72	319
values[2]	4069	1			T72	2		T356	14		T416	2
values[3]	1712	1			T484	41		T446	1		T731	24
values[4]	1282	1			T484	25		T731	21		T728	2
values[5]	1208	1			T484	24		T731	31		T728	2
values[6]	1152	1			T484	25		T731	29		T728	2
values[7]	1084	1			T484	20		T731	21		T728	1
values[8]	967	1			T484	28		T731	24		T728	2
values[9]	839	1			T484	25		T731	6		T728	3
values[10]	827	1			T484	65		T728	1		T860	1
values[11]	826	1			T484	86		T728	4		T860	1
values[12]	706	1			T484	94		T728	3		T860	3
values[13]	597	1			T484	62		T728	7		T860	3
values[14]	533	1			T484	74		T728	2		T860	5
values[15]	564	1			T484	95		T728	7		T860	2
values[16]	540	1			T484	88		T728	1		T860	1
values[17]	558	1			T484	74		T728	1		T860	1
values[18]	520	1			T484	28		T728	2		T860	2
values[19]	475	1			T484	12		T728	5		T860	1
values[20]	444	1			T484	21		T728	2		T860	2
values[21]	462	1			T484	13		T728	5		T860	3
values[22]	397	1			T484	17		T728	1		T860	6
values[23]	388	1			T484	6		T728	1		T860	5
values[24]	356	1			T484	5		T728	1		T860	3
values[25]	299	1			T484	5		T728	4		T860	1
values[26]	251	1			T484	1		T728	1		T860	2
values[27]	286	1			T728	3		T860	2		T861	15
values[28]	327	1			T728	7		T860	4		T861	35
values[29]	313	1			T728	1		T860	5		T861	51
values[30]	246	1			T728	2		T860	3		T861	44
values[31]	204	1			T728	5		T860	3		T861	13
values[32]	192	1			T728	3		T860	5		T851	1
values[33]	165	1			T728	1		T860	1		T851	1
values[34]	169	1			T728	1		T860	3		T851	1
values[35]	118	1			T728	2		T860	1		T851	1
values[36]	121	1			T728	4		T860	4		T851	1
values[37]	111	1			T728	5		T860	1		T851	1
values[38]	127	1			T728	2		T860	1		T851	1
values[39]	91	1			T728	1		T860	2		T851	1
values[40]	96	1			T728	1		T860	3		T851	1
values[41]	97	1			T728	2		T860	1		T851	1
values[42]	93	1			T728	4		T860	2		T851	1
values[43]	98	1			T728	7		T860	4		T851	1
values[44]	90	1			T728	2		T860	4		T851	1
values[45]	74	1			T728	4		T860	2		T851	1
values[46]	63	1			T728	4		T860	3		T851	1
values[47]	78	1			T728	5		T860	3		T851	1
values[48]	80	1			T728	7		T860	5		T851	1
values[49]	83	1			T728	10		T860	3		T851	1
values[50]	74	1			T728	2		T860	4		T851	1
values[51]	64	1			T728	2		T860	1		T851	1
values[52]	59	1			T728	2		T860	1		T851	1
values[53]	65	1			T728	5		T860	2		T851	1
values[54]	51	1			T728	2		T860	3		T851	2
values[55]	50	1			T728	3		T860	3		T851	1
values[56]	58	1			T728	1		T860	4		T851	1
values[57]	54	1			T728	3		T860	3		T851	1
values[58]	66	1			T728	2		T860	5		T851	1
values[59]	60	1			T728	2		T860	4		T851	1
values[60]	49	1			T728	1		T860	2		T851	1
values[61]	51	1			T728	2		T860	4		T851	1
values[62]	60	1			T728	4		T860	2		T851	1
values[63]	49	1			T728	2		T860	1		T851	1
values[64]	61	1			T728	2		T860	5		T851	1
values[65]	61	1			T728	4		T860	3		T851	1
values[66]	57	1			T728	6		T860	4		T851	1
values[67]	65	1			T728	14		T860	4		T851	1
values[68]	68	1			T728	4		T860	2		T851	1
values[69]	67	1			T728	1		T860	7		T851	1
values[70]	67	1			T728	1		T860	3		T851	1
values[71]	61	1			T728	3		T860	2		T851	1
values[72]	57	1			T728	2		T860	2		T851	1
values[73]	55	1			T728	2		T860	3		T851	1
values[74]	60	1			T728	1		T860	1		T851	1
values[75]	51	1			T728	2		T860	1		T851	1
values[76]	62	1			T728	2		T860	5		T851	1
values[77]	75	1			T728	1		T860	3		T851	1
values[78]	74	1			T728	2		T860	11		T851	1
values[79]	59	1			T728	2		T860	3		T851	1
values[80]	62	1			T728	1		T860	5		T851	1
values[81]	61	1			T728	5		T860	1		T851	1
values[82]	57	1			T728	3		T860	1		T851	1
values[83]	57	1			T728	1		T860	3		T851	1
values[84]	62	1			T728	1		T860	2		T851	1
values[85]	68	1			T728	5		T860	2		T851	1
values[86]	83	1			T728	8		T860	1		T851	1
values[87]	78	1			T728	7		T860	3		T851	1
values[88]	80	1			T728	5		T860	5		T851	1
values[89]	87	1			T728	4		T860	2		T851	1
values[90]	73	1			T728	2		T860	1		T851	1
values[91]	83	1			T728	1		T860	6		T851	1
values[92]	77	1			T728	2		T860	6		T851	1
values[93]	82	1			T728	4		T860	6		T851	1
values[94]	96	1			T728	5		T860	6		T851	1
values[95]	76	1			T728	1		T860	4		T851	1
values[96]	92	1			T728	2		T860	5		T851	1
values[97]	67	1			T728	2		T860	3		T851	1
values[98]	71	1			T728	3		T860	4		T851	1
values[99]	74	1			T728	3		T860	1		T851	1
values[100]	69	1			T728	10		T860	5		T851	1
values[101]	69	1			T728	4		T860	4		T851	1
values[102]	74	1			T728	3		T860	1		T851	1
values[103]	80	1			T728	4		T860	2		T851	1
values[104]	85	1			T728	3		T860	1		T851	1
values[105]	101	1			T728	2		T860	2		T851	1
values[106]	65	1			T728	1		T860	2		T851	1
values[107]	81	1			T728	6		T860	2		T851	1
values[108]	85	1			T728	2		T860	5		T851	1
values[109]	63	1			T728	2		T860	1		T851	1
values[110]	82	1			T728	1		T860	2		T851	1
values[111]	89	1			T728	4		T860	4		T851	1
values[112]	64	1			T728	3		T860	1		T851	1
values[113]	93	1			T728	1		T860	1		T851	1
values[114]	106	1			T728	7		T860	4		T851	1
values[115]	110	1			T728	10		T860	1		T851	1
values[116]	95	1			T728	14		T860	2		T851	1
values[117]	117	1			T728	23		T860	4		T851	1
values[118]	107	1			T728	11		T860	5		T851	1
values[119]	127	1			T728	8		T860	11		T851	1
values[120]	104	1			T728	10		T860	4		T851	1
values[121]	98	1			T728	10		T860	3		T851	1
values[122]	119	1			T728	9		T860	3		T851	1
values[123]	136	1			T728	14		T860	1		T851	1
values[124]	187	1			T728	10		T860	16		T851	1
values[125]	377	1			T728	7		T860	39		T851	1
values[126]	803	1			T728	11		T860	59		T851	13
values[127]	2640	1			T728	7		T860	27		T851	96
values[128]	4341	1			T860	3		T851	202		T854	217