Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.ast_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143320	1			T68	9		T70	3		T73	26
values[2]	10698	1			T70	1		T73	3		T74	15
values[3]	3943	1			T74	4		T619	96		T405	70
values[4]	2134	1			T74	1		T619	52		T405	38
values[5]	1401	1			T74	3		T619	21		T405	40
values[6]	1077	1			T74	6		T619	26		T405	42
values[7]	844	1			T74	2		T619	71		T405	38
values[8]	656	1			T74	3		T619	47		T405	39
values[9]	509	1			T74	1		T619	35		T405	9
values[10]	462	1			T74	2		T619	24		T554	6
values[11]	428	1			T74	5		T619	15		T554	9
values[12]	349	1			T74	2		T619	4		T554	5
values[13]	358	1			T74	5		T554	14		T507	7
values[14]	316	1			T74	6		T554	6		T507	9
values[15]	362	1			T74	2		T554	4		T507	14
values[16]	303	1			T74	9		T554	8		T507	3
values[17]	311	1			T74	2		T554	4		T507	4
values[18]	334	1			T74	4		T554	10		T507	4
values[19]	291	1			T74	1		T554	10		T507	8
values[20]	276	1			T74	2		T554	9		T507	14
values[21]	319	1			T74	3		T554	6		T507	8
values[22]	292	1			T74	9		T554	6		T507	9
values[23]	320	1			T74	7		T554	4		T507	7
values[24]	318	1			T74	4		T554	9		T507	7
values[25]	278	1			T74	3		T554	10		T507	5
values[26]	319	1			T74	6		T554	9		T507	6
values[27]	306	1			T74	5		T554	12		T507	11
values[28]	278	1			T74	2		T554	7		T507	10
values[29]	256	1			T74	3		T554	6		T507	10
values[30]	295	1			T74	4		T554	6		T507	10
values[31]	283	1			T74	3		T554	5		T507	10
values[32]	256	1			T74	2		T554	3		T507	8
values[33]	292	1			T74	1		T554	4		T507	11
values[34]	281	1			T74	4		T554	10		T507	3
values[35]	347	1			T74	8		T554	42		T507	6
values[36]	270	1			T74	10		T554	5		T507	8
values[37]	266	1			T74	7		T554	5		T507	4
values[38]	286	1			T74	11		T554	4		T507	5
values[39]	254	1			T74	5		T554	4		T507	3
values[40]	254	1			T74	4		T554	5		T507	6
values[41]	279	1			T74	4		T554	1		T507	9
values[42]	294	1			T74	1		T507	21		T762	1
values[43]	263	1			T74	2		T507	15		T762	1
values[44]	243	1			T74	1		T507	8		T762	1
values[45]	256	1			T74	2		T507	7		T762	1
values[46]	265	1			T74	1		T507	7		T762	1
values[47]	256	1			T74	4		T507	14		T762	1
values[48]	231	1			T74	2		T507	7		T762	1
values[49]	211	1			T74	2		T507	4		T762	1
values[50]	286	1			T74	3		T507	13		T762	1
values[51]	255	1			T74	2		T507	16		T762	1
values[52]	286	1			T74	2		T507	13		T762	1
values[53]	268	1			T74	8		T507	19		T762	1
values[54]	211	1			T74	2		T507	14		T762	1
values[55]	215	1			T74	6		T507	2		T762	1
values[56]	224	1			T74	2		T762	1		T412	6
values[57]	186	1			T74	2		T762	1		T412	5
values[58]	172	1			T74	3		T762	1		T412	8
values[59]	204	1			T74	1		T762	1		T412	5
values[60]	168	1			T74	2		T762	1		T412	9
values[61]	159	1			T74	5		T762	1		T412	7
values[62]	163	1			T74	6		T762	1		T412	14
values[63]	188	1			T74	16		T762	1		T412	5
values[64]	139	1			T74	21		T762	1		T412	6
values[65]	128	1			T74	3		T762	1		T412	7
values[66]	134	1			T74	4		T762	1		T412	6
values[67]	142	1			T74	2		T762	1		T412	5
values[68]	120	1			T74	4		T762	1		T412	2
values[69]	122	1			T74	8		T762	1		T412	10
values[70]	135	1			T74	3		T762	1		T412	8
values[71]	134	1			T74	1		T762	1		T412	3
values[72]	148	1			T74	7		T762	1		T412	6
values[73]	149	1			T74	13		T762	1		T412	4
values[74]	147	1			T74	14		T762	1		T412	5
values[75]	137	1			T74	12		T762	1		T412	2
values[76]	120	1			T74	3		T762	1		T412	4
values[77]	119	1			T74	5		T762	1		T412	12
values[78]	143	1			T74	7		T762	1		T412	11
values[79]	122	1			T74	5		T762	1		T409	7
values[80]	116	1			T74	3		T762	2		T409	11
values[81]	117	1			T74	2		T762	1		T409	12
values[82]	109	1			T74	6		T762	1		T409	14
values[83]	110	1			T74	5		T762	1		T409	18
values[84]	121	1			T74	3		T762	1		T409	11
values[85]	123	1			T74	6		T762	1		T409	14
values[86]	145	1			T74	10		T762	1		T409	14
values[87]	129	1			T74	6		T762	1		T409	10
values[88]	112	1			T74	7		T762	1		T409	9
values[89]	109	1			T74	3		T762	1		T409	13
values[90]	129	1			T74	3		T762	1		T409	12
values[91]	93	1			T74	4		T762	1		T409	8
values[92]	104	1			T74	5		T762	1		T409	10
values[93]	116	1			T74	7		T762	1		T409	11
values[94]	89	1			T74	4		T762	1		T409	9
values[95]	88	1			T74	8		T762	1		T409	4
values[96]	77	1			T74	4		T762	1		T409	4
values[97]	91	1			T74	8		T762	1		T409	3
values[98]	103	1			T74	5		T762	1		T409	5
values[99]	78	1			T74	3		T762	1		T409	8
values[100]	74	1			T74	6		T762	1		T409	7
values[101]	82	1			T74	3		T762	1		T409	14
values[102]	95	1			T74	8		T762	1		T409	17
values[103]	90	1			T74	2		T762	1		T409	9
values[104]	91	1			T74	3		T762	1		T409	5
values[105]	78	1			T74	2		T762	1		T409	8
values[106]	96	1			T74	4		T762	1		T409	15
values[107]	80	1			T74	2		T762	1		T409	12
values[108]	68	1			T74	4		T762	1		T409	5
values[109]	71	1			T762	1		T763	7		T533	2
values[110]	80	1			T762	1		T763	5		T533	8
values[111]	74	1			T762	1		T763	8		T533	1
values[112]	71	1			T762	1		T763	5		T533	5
values[113]	95	1			T762	1		T763	2		T533	3
values[114]	70	1			T762	1		T763	5		T533	3
values[115]	62	1			T762	1		T763	4		T533	3
values[116]	65	1			T762	1		T763	2		T533	1
values[117]	65	1			T762	1		T763	2		T533	2
values[118]	69	1			T762	1		T763	2		T533	4
values[119]	77	1			T762	1		T763	2		T533	1
values[120]	49	1			T762	1		T763	3		T533	1
values[121]	62	1			T762	4		T763	6		T533	2
values[122]	48	1			T762	1		T763	3		T533	1
values[123]	53	1			T762	2		T763	3		T533	1
values[124]	63	1			T762	2		T763	6		T533	1
values[125]	70	1			T762	1		T763	3		T533	1
values[126]	126	1			T762	3		T763	12		T533	2
values[127]	671	1			T762	38		T763	44		T533	26
values[128]	5033	1			T762	326		T763	531		T533	266