Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_plic_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	202729	1			T68	7		T70	4		T73	18
values[2]	5955	1			T73	3		T74	12		T379	1
values[3]	2938	1			T74	22		T426	20		T756	1
values[4]	2037	1			T74	38		T426	12		T756	1
values[5]	1602	1			T74	29		T426	18		T756	1
values[6]	1163	1			T74	28		T426	14		T756	1
values[7]	945	1			T74	31		T426	4		T756	1
values[8]	794	1			T74	14		T426	15		T756	1
values[9]	821	1			T74	20		T426	11		T756	1
values[10]	782	1			T74	22		T426	10		T756	1
values[11]	637	1			T74	27		T426	12		T756	1
values[12]	615	1			T74	32		T426	5		T756	1
values[13]	639	1			T74	27		T426	7		T756	1
values[14]	617	1			T74	32		T426	5		T756	1
values[15]	515	1			T74	33		T426	3		T756	1
values[16]	464	1			T74	29		T426	7		T756	1
values[17]	427	1			T74	20		T426	3		T756	1
values[18]	451	1			T74	25		T426	2		T756	1
values[19]	380	1			T74	22		T756	1		T405	15
values[20]	378	1			T74	20		T756	1		T405	8
values[21]	355	1			T74	4		T756	1		T405	5
values[22]	378	1			T756	1		T405	16		T442	25
values[23]	348	1			T756	1		T405	9		T442	9
values[24]	308	1			T756	1		T405	9		T462	1
values[25]	271	1			T756	1		T405	2		T462	1
values[26]	270	1			T756	1		T462	1		T782	1
values[27]	277	1			T756	1		T462	1		T782	1
values[28]	209	1			T756	1		T462	1		T782	1
values[29]	194	1			T756	1		T462	1		T782	1
values[30]	205	1			T756	1		T462	1		T782	1
values[31]	216	1			T756	1		T462	1		T782	1
values[32]	178	1			T756	1		T462	1		T782	1
values[33]	125	1			T756	1		T462	1		T782	1
values[34]	106	1			T756	1		T462	1		T782	1
values[35]	100	1			T756	1		T462	1		T782	1
values[36]	80	1			T756	1		T462	1		T782	1
values[37]	59	1			T756	1		T462	1		T782	1
values[38]	78	1			T756	1		T462	1		T782	1
values[39]	68	1			T756	1		T462	1		T782	1
values[40]	57	1			T756	1		T462	1		T782	1
values[41]	62	1			T756	1		T462	1		T782	1
values[42]	84	1			T756	1		T462	1		T782	1
values[43]	78	1			T756	1		T462	1		T782	1
values[44]	75	1			T756	1		T462	1		T782	1
values[45]	64	1			T756	1		T462	1		T782	1
values[46]	42	1			T756	1		T462	1		T782	1
values[47]	46	1			T756	1		T462	1		T782	1
values[48]	42	1			T756	1		T462	1		T782	1
values[49]	42	1			T756	1		T462	1		T782	1
values[50]	44	1			T756	1		T462	1		T782	1
values[51]	40	1			T756	1		T462	1		T782	1
values[52]	52	1			T756	1		T462	1		T782	1
values[53]	43	1			T756	1		T462	1		T782	1
values[54]	45	1			T756	1		T462	1		T782	1
values[55]	44	1			T756	1		T462	1		T782	1
values[56]	38	1			T756	1		T462	1		T782	1
values[57]	46	1			T756	1		T462	1		T782	1
values[58]	39	1			T756	1		T462	1		T782	1
values[59]	41	1			T756	1		T462	1		T782	1
values[60]	39	1			T756	1		T462	1		T782	1
values[61]	38	1			T756	1		T462	1		T782	1
values[62]	37	1			T756	1		T462	1		T782	1
values[63]	40	1			T756	1		T462	1		T782	1
values[64]	40	1			T756	1		T462	1		T782	1
values[65]	42	1			T756	1		T462	1		T782	1
values[66]	33	1			T756	1		T462	1		T782	1
values[67]	42	1			T756	1		T462	1		T782	1
values[68]	38	1			T756	1		T462	1		T782	1
values[69]	33	1			T756	1		T462	1		T782	1
values[70]	39	1			T756	1		T462	1		T782	1
values[71]	41	1			T756	1		T462	1		T782	1
values[72]	32	1			T756	1		T462	1		T782	1
values[73]	41	1			T756	1		T462	1		T782	1
values[74]	34	1			T756	1		T462	1		T782	1
values[75]	37	1			T756	1		T462	1		T782	1
values[76]	49	1			T756	1		T462	1		T782	1
values[77]	53	1			T756	1		T462	1		T782	1
values[78]	56	1			T756	1		T462	1		T782	1
values[79]	51	1			T756	1		T462	1		T782	1
values[80]	51	1			T756	1		T462	1		T782	1
values[81]	61	1			T756	1		T462	1		T782	1
values[82]	55	1			T756	1		T462	1		T782	1
values[83]	44	1			T756	1		T462	1		T782	1
values[84]	59	1			T756	1		T462	1		T782	1
values[85]	48	1			T756	1		T462	1		T782	1
values[86]	48	1			T756	2		T462	1		T782	1
values[87]	49	1			T756	2		T462	1		T782	2
values[88]	60	1			T756	7		T462	1		T782	3
values[89]	51	1			T756	6		T462	1		T782	1
values[90]	57	1			T756	1		T462	1		T782	1
values[91]	57	1			T756	1		T462	1		T782	4
values[92]	59	1			T756	1		T462	1		T782	3
values[93]	56	1			T756	3		T462	1		T782	7
values[94]	60	1			T756	2		T462	2		T782	2
values[95]	55	1			T756	1		T462	1		T782	2
values[96]	60	1			T756	1		T462	1		T782	6
values[97]	54	1			T756	1		T462	1		T782	5
values[98]	57	1			T756	1		T462	1		T782	3
values[99]	61	1			T756	2		T462	1		T782	3
values[100]	60	1			T756	3		T462	1		T782	8
values[101]	55	1			T756	1		T462	3		T782	1
values[102]	64	1			T756	2		T462	3		T782	1
values[103]	70	1			T756	2		T462	3		T782	2
values[104]	70	1			T756	4		T462	1		T782	6
values[105]	59	1			T756	6		T462	1		T782	2
values[106]	75	1			T756	2		T462	4		T782	1
values[107]	63	1			T756	1		T462	2		T782	1
values[108]	72	1			T756	4		T462	4		T782	1
values[109]	79	1			T756	2		T462	4		T782	1
values[110]	61	1			T756	1		T462	1		T782	3
values[111]	64	1			T756	2		T462	1		T782	5
values[112]	74	1			T756	2		T462	3		T782	1
values[113]	76	1			T756	1		T462	4		T782	3
values[114]	67	1			T756	2		T462	2		T782	3
values[115]	72	1			T756	1		T462	1		T782	5
values[116]	68	1			T756	2		T462	3		T782	2
values[117]	78	1			T756	2		T462	1		T782	1
values[118]	68	1			T756	1		T462	1		T782	3
values[119]	65	1			T756	1		T462	1		T782	1
values[120]	61	1			T756	2		T462	3		T782	3
values[121]	74	1			T756	2		T462	2		T782	1
values[122]	73	1			T756	1		T462	2		T782	1
values[123]	108	1			T756	1		T462	3		T782	1
values[124]	180	1			T756	4		T462	2		T782	1
values[125]	318	1			T756	4		T462	1		T782	4
values[126]	572	1			T756	9		T462	23		T782	11
values[127]	2275	1			T756	116		T462	98		T782	94
values[128]	3938	1			T756	243		T462	162		T782	231