Unified Coverage Report :: Group :: chip_env_pkg::chip_alert_cg_wrap::alert_cg

Group : chip_env_pkg::chip_alert_cg_wrap::alert_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_chip_env_0.1/chip_env_cov.sv

65 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
adc_ctrl_aon_fatal_fault	100.00	1	100	1	64	64
aes_fatal_fault	100.00	1	100	1	64	64
aes_recov_ctrl_update_err	100.00	1	100	1	64	64
aon_timer_aon_fatal_fault	100.00	1	100	1	64	64
clkmgr_aon_fatal_fault	100.00	1	100	1	64	64
clkmgr_aon_recov_fault	100.00	1	100	1	64	64
csrng_fatal_alert	100.00	1	100	1	64	64
csrng_recov_alert	100.00	1	100	1	64	64
edn0_fatal_alert	100.00	1	100	1	64	64
edn0_recov_alert	100.00	1	100	1	64	64
edn1_fatal_alert	100.00	1	100	1	64	64
edn1_recov_alert	100.00	1	100	1	64	64
entropy_src_fatal_alert	100.00	1	100	1	64	64
entropy_src_recov_alert	100.00	1	100	1	64	64
flash_ctrl_fatal_err	100.00	1	100	1	64	64
flash_ctrl_fatal_prim_flash_alert	100.00	1	100	1	64	64
flash_ctrl_fatal_std_err	100.00	1	100	1	64	64
flash_ctrl_recov_err	100.00	1	100	1	64	64
flash_ctrl_recov_prim_flash_alert	100.00	1	100	1	64	64
gpio_fatal_fault	100.00	1	100	1	64	64
hmac_fatal_fault	100.00	1	100	1	64	64
i2c0_fatal_fault	100.00	1	100	1	64	64
i2c1_fatal_fault	100.00	1	100	1	64	64
i2c2_fatal_fault	100.00	1	100	1	64	64
keymgr_fatal_fault_err	100.00	1	100	1	64	64
keymgr_recov_operation_err	100.00	1	100	1	64	64
kmac_fatal_fault_err	100.00	1	100	1	64	64
kmac_recov_operation_err	100.00	1	100	1	64	64
lc_ctrl_fatal_bus_integ_error	100.00	1	100	1	64	64
lc_ctrl_fatal_prog_error	100.00	1	100	1	64	64
lc_ctrl_fatal_state_error	100.00	1	100	1	64	64
otbn_fatal	100.00	1	100	1	64	64
otbn_recov	100.00	1	100	1	64	64
otp_ctrl_fatal_bus_integ_error	100.00	1	100	1	64	64
otp_ctrl_fatal_check_error	100.00	1	100	1	64	64
otp_ctrl_fatal_macro_error	100.00	1	100	1	64	64
otp_ctrl_fatal_prim_otp_alert	100.00	1	100	1	64	64
otp_ctrl_recov_prim_otp_alert	100.00	1	100	1	64	64
pattgen_fatal_fault	100.00	1	100	1	64	64
pinmux_aon_fatal_fault	100.00	1	100	1	64	64
pwm_aon_fatal_fault	100.00	1	100	1	64	64
pwrmgr_aon_fatal_fault	100.00	1	100	1	64	64
rom_ctrl_fatal	100.00	1	100	1	64	64
rstmgr_aon_fatal_cnsty_fault	100.00	1	100	1	64	64
rstmgr_aon_fatal_fault	100.00	1	100	1	64	64
rv_core_ibex_fatal_hw_err	100.00	1	100	1	64	64
rv_core_ibex_fatal_sw_err	100.00	1	100	1	64	64
rv_core_ibex_recov_hw_err	100.00	1	100	1	64	64
rv_core_ibex_recov_sw_err	100.00	1	100	1	64	64
rv_dm_fatal_fault	100.00	1	100	1	64	64
rv_plic_fatal_fault	100.00	1	100	1	64	64
rv_timer_fatal_fault	100.00	1	100	1	64	64
sensor_ctrl_aon_fatal_alert	100.00	1	100	1	64	64
sensor_ctrl_aon_recov_alert	100.00	1	100	1	64	64
spi_device_fatal_fault	100.00	1	100	1	64	64
spi_host0_fatal_fault	100.00	1	100	1	64	64
spi_host1_fatal_fault	100.00	1	100	1	64	64
sram_ctrl_main_fatal_error	100.00	1	100	1	64	64
sram_ctrl_ret_aon_fatal_error	100.00	1	100	1	64	64
sysrst_ctrl_aon_fatal_fault	100.00	1	100	1	64	64
uart0_fatal_fault	100.00	1	100	1	64	64
uart1_fatal_fault	100.00	1	100	1	64	64
uart2_fatal_fault	100.00	1	100	1	64	64
uart3_fatal_fault	100.00	1	100	1	64	64
usbdev_fatal_fault	100.00	1	100	1	64	64

---

Group Instance : adc_ctrl_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance adc_ctrl_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance adc_ctrl_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aes_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aes_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aes_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aes_recov_ctrl_update_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aes_recov_ctrl_update_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aes_recov_ctrl_update_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : aon_timer_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance aon_timer_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance aon_timer_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : clkmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance clkmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance clkmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : clkmgr_aon_recov_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance clkmgr_aon_recov_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance clkmgr_aon_recov_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : csrng_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance csrng_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance csrng_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : csrng_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance csrng_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance csrng_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn0_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn0_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn0_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn0_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn0_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn0_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn1_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn1_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn1_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : edn1_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance edn1_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance edn1_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : entropy_src_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance entropy_src_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance entropy_src_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : entropy_src_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance entropy_src_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance entropy_src_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_prim_flash_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_prim_flash_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_prim_flash_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_fatal_std_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_fatal_std_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_fatal_std_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_recov_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_recov_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_recov_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : flash_ctrl_recov_prim_flash_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance flash_ctrl_recov_prim_flash_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance flash_ctrl_recov_prim_flash_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : gpio_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance gpio_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance gpio_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : hmac_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance hmac_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance hmac_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : i2c2_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance i2c2_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance i2c2_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : keymgr_fatal_fault_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance keymgr_fatal_fault_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance keymgr_fatal_fault_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : keymgr_recov_operation_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance keymgr_recov_operation_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance keymgr_recov_operation_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : kmac_fatal_fault_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance kmac_fatal_fault_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance kmac_fatal_fault_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : kmac_recov_operation_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance kmac_recov_operation_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance kmac_recov_operation_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_bus_integ_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_bus_integ_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_bus_integ_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_prog_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_prog_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_prog_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : lc_ctrl_fatal_state_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance lc_ctrl_fatal_state_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance lc_ctrl_fatal_state_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otbn_fatal

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otbn_fatal

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otbn_fatal

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otbn_recov

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otbn_recov

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otbn_recov

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_bus_integ_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_bus_integ_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_bus_integ_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_check_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_check_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_check_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_macro_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_macro_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_macro_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_fatal_prim_otp_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_fatal_prim_otp_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_fatal_prim_otp_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : otp_ctrl_recov_prim_otp_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance otp_ctrl_recov_prim_otp_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance otp_ctrl_recov_prim_otp_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pattgen_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pattgen_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pattgen_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pinmux_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pinmux_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pinmux_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pwm_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pwm_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pwm_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : pwrmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance pwrmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance pwrmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rom_ctrl_fatal

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rom_ctrl_fatal

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rom_ctrl_fatal

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rstmgr_aon_fatal_cnsty_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rstmgr_aon_fatal_cnsty_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rstmgr_aon_fatal_cnsty_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rstmgr_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rstmgr_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rstmgr_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_fatal_hw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_fatal_hw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_fatal_hw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_fatal_sw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_fatal_sw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_fatal_sw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_recov_hw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_recov_hw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_recov_hw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_core_ibex_recov_sw_err

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_core_ibex_recov_sw_err

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_core_ibex_recov_sw_err

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_dm_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_dm_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_dm_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_plic_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_plic_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_plic_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : rv_timer_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance rv_timer_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance rv_timer_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sensor_ctrl_aon_fatal_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sensor_ctrl_aon_fatal_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sensor_ctrl_aon_fatal_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sensor_ctrl_aon_recov_alert

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sensor_ctrl_aon_recov_alert

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sensor_ctrl_aon_recov_alert

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_device_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_device_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_device_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_host0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_host0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_host0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : spi_host1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance spi_host1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance spi_host1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sram_ctrl_main_fatal_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sram_ctrl_main_fatal_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sram_ctrl_main_fatal_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sram_ctrl_ret_aon_fatal_error

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sram_ctrl_ret_aon_fatal_error

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sram_ctrl_ret_aon_fatal_error

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : sysrst_ctrl_aon_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sysrst_ctrl_aon_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance sysrst_ctrl_aon_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart0_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart0_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart0_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart1_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart1_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart1_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart2_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart2_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart2_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : uart3_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance uart3_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance uart3_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

---

Group Instance : usbdev_fatal_fault

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance usbdev_fatal_fault

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	1	0	1	100.00

Variables for Group Instance usbdev_fatal_fault

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
triggered_cp	1	0	1	100.00	100	1	1	2

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3670

1

T663

813

T82

37

T83

40

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

123991

1

T15

4311

T38

584

T39

583

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

163

1

T82

28

T83

38

T148

35

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4239

1

T94

518

T96

815

T664

529

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6275

1

T304

812

T255

501

T342

821

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

799

1

T276

104

T82

33

T704

105

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4185

1

T641

1177

T82

23

T83

41

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

166

1

T635

1

T636

1

T82

24

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

9918

1

T637

1128

T640

1729

T82

31

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

175

1

T635

1

T636

1

T82

28

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4615

1

T88

1071

T638

1103

T82

20

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

170

1

T82

27

T83

48

T77

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1828

1

T82

34

T83

42

T148

40

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

170

1

T82

23

T83

35

T77

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

8534

1

T158

313

T162

306

T296

363

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5887

1

T82

32

T83

29

T707

1167

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1868

1

T82

29

T83

38

T148

28

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

380

1

T158

10

T338

5

T409

2

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

163

1

T82

42

T83

34

T148

32

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1787

1

T82

23

T83

32

T77

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2971

1

T410

1103

T82

16

T83

38

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2657

1

T82

38

T686

809

T83

47

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2067

1

T82

35

T83

32

T77

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1805

1

T82

29

T697

817

T83

33

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3370

1

T82

26

T83

42

T148

34

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

157

1

T82

24

T83

32

T77

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

126341

1

T15

4311

T38

584

T39

583

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

174

1

T82

22

T83

44

T148

41

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4249

1

T301

813

T302

808

T82

33

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1896

1

T82

24

T83

42

T148

42

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5076

1

T300

819

T147

816

T156

817

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1399172

1

T15

4311

T38

584

T39

583

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

182

1

T282

1

T82

28

T83

37

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2823

1

T149

505

T82

28

T699

501

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

55962

1

T15

2036

T38

275

T39

274

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1003

1

T147

816

T82

30

T83

31

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2844

1

T82

32

T83

37

T148

38

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

191

1

T82

21

T83

48

T148

46

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3960

1

T660

508

T82

28

T343

819

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2607

1

T80

815

T82

24

T90

810

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5293

1

T2

1

T277

823

T305

818

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6771

1

T15

3

T16

484

T107

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

10889

1

T2

1

T98

1102

T82

27

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2646

1

T2

1

T661

816

T82

31

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1500

1

T2

1

T82

25

T83

35

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

30384

1

T215

2841

T216

2849

T218

358

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5197

1

T82

15

T83

36

T148

44

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

101

1

T2

1

T82

6

T83

20

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

249

1

T53

1

T2

2

T181

1

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

9310

1

T189

1706

T2

1

T665

1155

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

6477

1

T340

1721

T82

28

T83

51

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1505

1

T2

1

T82

19

T83

36

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

5211

1

T39

809

T2

1

T240

812

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

17633

1

T59

1

T122

654

T123

1197

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3382

1

T205

510

T348

820

T82

30

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

8459

1

T2

1

T708

1681

T82

36

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4402

1

T38

1296

T709

838

T82

27

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1885

1

T82

24

T83

34

T148

42

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

191

1

T2

1

T82

26

T83

35

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

4153

1

T188

808

T662

517

T82

22

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3885

1

T339

811

T239

523

T82

23

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3366

1

T254

808

T349

815

T82

31

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

2209

1

T82

25

T83

37

T148

32

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

3351

1

T275

524

T659

521

T82

22

Summary for Variable triggered_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for triggered_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ignore	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[1]

1877

1

T82

32

T83

35

T148

41