Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.ast_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	134178	1			T74	74		T76	13		T78	1
values[2]	9413	1			T74	2		T508	4		T507	1
values[3]	3732	1			T74	1		T416	1		T688	1
values[4]	2286	1			T416	1		T396	1		T801	1
values[5]	1378	1			T416	1		T396	1		T801	2
values[6]	851	1			T416	1		T396	1		T801	3
values[7]	582	1			T416	1		T396	1		T801	1
values[8]	414	1			T416	1		T396	1		T801	1
values[9]	379	1			T416	1		T396	1		T801	3
values[10]	348	1			T416	1		T396	2		T801	6
values[11]	397	1			T416	1		T396	1		T801	4
values[12]	323	1			T416	1		T396	1		T801	4
values[13]	265	1			T416	1		T396	1		T801	3
values[14]	261	1			T416	1		T396	1		T801	2
values[15]	279	1			T416	1		T396	1		T801	3
values[16]	323	1			T416	1		T396	1		T801	5
values[17]	277	1			T416	1		T396	1		T801	6
values[18]	308	1			T416	1		T396	1		T801	12
values[19]	282	1			T416	1		T396	1		T801	1
values[20]	278	1			T416	1		T396	1		T801	4
values[21]	223	1			T416	1		T396	1		T801	6
values[22]	264	1			T416	1		T396	1		T801	2
values[23]	257	1			T416	1		T396	1		T801	1
values[24]	282	1			T416	1		T396	1		T801	2
values[25]	310	1			T416	1		T396	1		T801	6
values[26]	261	1			T416	1		T396	1		T801	2
values[27]	277	1			T416	1		T396	1		T801	6
values[28]	259	1			T416	1		T396	1		T801	3
values[29]	263	1			T416	1		T396	1		T801	1
values[30]	277	1			T416	1		T396	1		T801	5
values[31]	273	1			T416	1		T396	1		T801	8
values[32]	320	1			T416	1		T396	1		T801	7
values[33]	249	1			T416	1		T396	1		T801	2
values[34]	263	1			T416	1		T396	1		T801	12
values[35]	282	1			T416	1		T396	1		T801	11
values[36]	290	1			T416	1		T396	1		T801	12
values[37]	256	1			T416	1		T396	1		T801	8
values[38]	251	1			T416	1		T396	1		T801	5
values[39]	256	1			T416	1		T396	1		T801	2
values[40]	257	1			T416	2		T396	1		T801	1
values[41]	237	1			T416	1		T396	1		T801	3
values[42]	232	1			T416	1		T396	1		T801	1
values[43]	316	1			T416	1		T396	1		T801	2
values[44]	290	1			T416	1		T396	1		T801	1
values[45]	263	1			T416	1		T396	1		T801	2
values[46]	271	1			T416	1		T396	1		T801	5
values[47]	241	1			T416	1		T396	2		T801	1
values[48]	254	1			T416	1		T396	1		T801	1
values[49]	210	1			T416	1		T396	1		T801	2
values[50]	274	1			T416	1		T396	1		T801	1
values[51]	228	1			T416	1		T396	1		T801	6
values[52]	231	1			T416	1		T396	1		T801	6
values[53]	197	1			T416	1		T396	1		T801	8
values[54]	258	1			T416	1		T396	1		T801	2
values[55]	229	1			T416	1		T396	1		T801	1
values[56]	219	1			T416	1		T396	1		T801	3
values[57]	217	1			T416	1		T396	1		T801	1
values[58]	196	1			T416	1		T396	1		T801	2
values[59]	171	1			T416	1		T396	1		T801	1
values[60]	211	1			T416	1		T396	1		T801	1
values[61]	182	1			T416	1		T396	1		T801	2
values[62]	179	1			T416	1		T396	1		T801	6
values[63]	133	1			T416	1		T396	1		T801	3
values[64]	152	1			T416	1		T396	1		T801	1
values[65]	107	1			T416	1		T396	1		T801	2
values[66]	85	1			T416	1		T396	1		T801	2
values[67]	83	1			T416	1		T396	1		T801	1
values[68]	69	1			T416	1		T396	1		T801	1
values[69]	79	1			T416	1		T396	1		T801	4
values[70]	76	1			T416	1		T396	1		T801	1
values[71]	100	1			T416	1		T396	1		T801	2
values[72]	76	1			T416	1		T396	1		T801	2
values[73]	61	1			T416	1		T396	1		T801	1
values[74]	51	1			T416	1		T396	1		T801	2
values[75]	55	1			T416	1		T396	1		T801	1
values[76]	51	1			T416	1		T396	1		T801	4
values[77]	51	1			T416	1		T396	1		T801	10
values[78]	49	1			T416	1		T396	1		T801	3
values[79]	58	1			T416	1		T396	1		T801	4
values[80]	64	1			T416	1		T396	1		T801	8
values[81]	64	1			T416	1		T396	1		T801	4
values[82]	45	1			T416	1		T396	1		T801	1
values[83]	54	1			T416	1		T396	1		T801	3
values[84]	44	1			T416	1		T396	1		T801	2
values[85]	60	1			T416	1		T396	1		T801	2
values[86]	53	1			T416	1		T396	1		T801	1
values[87]	54	1			T416	1		T396	1		T801	2
values[88]	50	1			T416	1		T396	1		T801	1
values[89]	56	1			T416	1		T396	1		T801	2
values[90]	57	1			T416	1		T396	1		T801	7
values[91]	71	1			T416	1		T396	1		T801	5
values[92]	83	1			T416	1		T396	1		T801	4
values[93]	80	1			T416	1		T396	1		T801	4
values[94]	66	1			T416	1		T396	1		T801	2
values[95]	67	1			T416	1		T396	1		T801	5
values[96]	62	1			T416	1		T396	1		T801	4
values[97]	62	1			T416	1		T396	1		T801	2
values[98]	74	1			T416	1		T396	1		T801	2
values[99]	90	1			T416	1		T396	1		T801	2
values[100]	71	1			T416	11		T396	1		T801	6
values[101]	75	1			T416	3		T396	2		T801	8
values[102]	89	1			T416	1		T396	1		T801	9
values[103]	65	1			T416	1		T396	1		T801	3
values[104]	68	1			T416	5		T396	1		T801	2
values[105]	57	1			T416	5		T396	1		T801	5
values[106]	63	1			T416	1		T396	1		T801	3
values[107]	90	1			T416	5		T396	1		T801	4
values[108]	95	1			T416	1		T396	1		T801	2
values[109]	79	1			T416	2		T396	1		T801	4
values[110]	86	1			T416	3		T396	1		T801	2
values[111]	73	1			T416	3		T396	1		T801	4
values[112]	77	1			T416	1		T396	1		T801	3
values[113]	92	1			T416	2		T396	1		T801	3
values[114]	80	1			T416	2		T396	1		T801	2
values[115]	77	1			T416	2		T396	1		T801	6
values[116]	69	1			T416	2		T396	1		T801	3
values[117]	90	1			T416	2		T396	1		T801	2
values[118]	95	1			T416	2		T396	1		T801	2
values[119]	82	1			T416	1		T396	1		T801	2
values[120]	65	1			T416	1		T396	1		T801	4
values[121]	60	1			T416	1		T396	1		T801	1
values[122]	83	1			T416	3		T396	1		T801	2
values[123]	75	1			T416	1		T396	1		T801	3
values[124]	78	1			T416	1		T396	1		T801	8
values[125]	107	1			T416	9		T396	5		T801	5
values[126]	146	1			T416	2		T396	1		T801	9
values[127]	917	1			T416	31		T396	32		T801	45
values[128]	7355	1			T416	289		T396	306		T801	18