Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141846	1			T76	7		T77	7		T78	10
values[2]	10883	1			T78	1		T82	1		T158	1
values[3]	4336	1			T82	1		T423	75		T534	32
values[4]	2321	1			T82	1		T423	58		T534	36
values[5]	1623	1			T82	1		T423	65		T534	24
values[6]	1138	1			T82	1		T423	23		T534	20
values[7]	814	1			T82	1		T423	19		T534	6
values[8]	588	1			T82	1		T423	21		T534	2
values[9]	480	1			T82	1		T423	21		T534	5
values[10]	499	1			T82	1		T423	24		T534	4
values[11]	501	1			T82	1		T423	17		T534	1
values[12]	474	1			T82	1		T423	26		T534	5
values[13]	453	1			T82	1		T423	15		T534	6
values[14]	384	1			T82	1		T423	4		T542	4
values[15]	373	1			T82	1		T542	8		T453	7
values[16]	371	1			T82	1		T542	12		T453	7
values[17]	318	1			T82	1		T542	2		T453	8
values[18]	334	1			T82	1		T542	8		T453	7
values[19]	308	1			T82	1		T542	3		T453	6
values[20]	342	1			T82	1		T542	15		T453	8
values[21]	347	1			T82	1		T542	14		T453	2
values[22]	331	1			T82	1		T542	13		T453	5
values[23]	319	1			T82	1		T542	4		T453	7
values[24]	340	1			T82	1		T542	3		T453	6
values[25]	345	1			T82	1		T542	7		T453	4
values[26]	360	1			T82	1		T542	6		T453	11
values[27]	300	1			T82	1		T542	15		T453	7
values[28]	368	1			T82	1		T542	9		T453	9
values[29]	338	1			T82	1		T542	5		T453	11
values[30]	295	1			T82	1		T542	5		T453	4
values[31]	307	1			T82	1		T542	2		T453	6
values[32]	310	1			T82	1		T542	3		T453	11
values[33]	339	1			T82	1		T542	6		T453	6
values[34]	272	1			T82	1		T542	4		T453	8
values[35]	316	1			T82	1		T542	12		T453	5
values[36]	286	1			T82	1		T542	9		T453	8
values[37]	322	1			T82	1		T542	15		T453	8
values[38]	301	1			T82	1		T542	6		T453	7
values[39]	359	1			T82	1		T542	5		T453	7
values[40]	340	1			T82	1		T542	5		T453	7
values[41]	331	1			T82	1		T542	10		T453	4
values[42]	326	1			T82	1		T542	2		T453	17
values[43]	355	1			T82	1		T542	8		T453	7
values[44]	342	1			T82	1		T542	7		T453	8
values[45]	292	1			T82	1		T542	6		T453	9
values[46]	287	1			T82	1		T542	5		T453	12
values[47]	285	1			T82	1		T542	7		T453	7
values[48]	248	1			T82	1		T542	4		T453	3
values[49]	248	1			T82	1		T542	32		T453	5
values[50]	270	1			T82	1		T542	14		T453	10
values[51]	281	1			T82	1		T542	10		T453	11
values[52]	237	1			T82	1		T542	17		T453	9
values[53]	282	1			T82	1		T542	6		T453	16
values[54]	274	1			T82	1		T542	4		T453	3
values[55]	260	1			T82	1		T542	5		T453	16
values[56]	271	1			T82	1		T542	12		T453	3
values[57]	241	1			T82	1		T453	4		T576	11
values[58]	263	1			T82	1		T453	4		T576	11
values[59]	186	1			T82	1		T453	4		T576	8
values[60]	247	1			T82	1		T453	8		T576	9
values[61]	190	1			T82	1		T453	11		T576	4
values[62]	215	1			T82	1		T453	4		T576	2
values[63]	193	1			T82	1		T453	5		T611	19
values[64]	190	1			T82	1		T453	3		T611	5
values[65]	168	1			T82	1		T453	6		T611	15
values[66]	172	1			T82	1		T453	7		T611	4
values[67]	196	1			T82	1		T453	8		T611	7
values[68]	168	1			T82	1		T453	5		T788	1
values[69]	154	1			T82	1		T788	1		T790	1
values[70]	117	1			T82	1		T788	1		T790	1
values[71]	123	1			T82	1		T788	1		T790	1
values[72]	141	1			T82	1		T788	2		T790	1
values[73]	110	1			T82	1		T788	1		T790	1
values[74]	109	1			T82	1		T788	1		T790	1
values[75]	129	1			T82	1		T788	1		T790	12
values[76]	101	1			T82	1		T788	1		T790	2
values[77]	90	1			T82	1		T788	1		T790	2
values[78]	133	1			T82	1		T788	1		T790	6
values[79]	91	1			T82	1		T788	1		T790	2
values[80]	109	1			T82	1		T788	1		T790	1
values[81]	113	1			T82	1		T788	1		T790	3
values[82]	105	1			T82	1		T788	1		T790	3
values[83]	106	1			T82	1		T788	1		T790	3
values[84]	116	1			T82	1		T788	1		T790	2
values[85]	111	1			T82	1		T788	1		T790	2
values[86]	105	1			T82	1		T788	1		T790	3
values[87]	88	1			T82	1		T788	1		T790	4
values[88]	119	1			T82	1		T788	1		T790	5
values[89]	136	1			T82	1		T788	1		T790	5
values[90]	112	1			T82	1		T788	1		T790	1
values[91]	102	1			T82	1		T788	1		T790	5
values[92]	100	1			T82	1		T788	1		T790	1
values[93]	122	1			T82	1		T788	1		T790	3
values[94]	123	1			T82	1		T788	1		T790	5
values[95]	106	1			T82	1		T788	1		T790	7
values[96]	119	1			T82	2		T788	1		T790	2
values[97]	98	1			T82	3		T788	1		T790	1
values[98]	116	1			T82	1		T788	1		T790	3
values[99]	112	1			T82	3		T788	1		T790	4
values[100]	109	1			T82	2		T788	1		T790	1
values[101]	118	1			T82	1		T788	6		T790	1
values[102]	126	1			T82	3		T788	1		T790	4
values[103]	94	1			T82	2		T788	1		T790	1
values[104]	132	1			T82	17		T788	2		T790	2
values[105]	128	1			T82	4		T788	2		T790	1
values[106]	121	1			T82	4		T788	5		T790	1
values[107]	137	1			T82	4		T788	2		T790	2
values[108]	131	1			T82	1		T788	10		T790	3
values[109]	89	1			T82	1		T788	2		T790	2
values[110]	118	1			T82	1		T788	2		T790	1
values[111]	112	1			T82	1		T788	2		T790	3
values[112]	94	1			T82	2		T788	1		T790	2
values[113]	118	1			T82	1		T788	1		T790	1
values[114]	111	1			T82	3		T788	1		T790	2
values[115]	117	1			T82	2		T788	4		T790	4
values[116]	104	1			T82	2		T788	1		T790	1
values[117]	117	1			T82	1		T788	2		T790	2
values[118]	116	1			T82	2		T788	2		T790	3
values[119]	100	1			T82	3		T788	2		T790	1
values[120]	117	1			T82	4		T788	1		T790	7
values[121]	115	1			T82	2		T788	7		T790	2
values[122]	111	1			T82	1		T788	5		T790	1
values[123]	112	1			T82	4		T788	2		T790	1
values[124]	109	1			T82	1		T788	4		T790	2
values[125]	136	1			T82	2		T788	1		T790	4
values[126]	198	1			T82	3		T788	2		T790	3
values[127]	1167	1			T82	28		T788	28		T790	12
values[128]	9945	1			T82	266		T788	314		T790	242