Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.edn1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	161485	1			T76	4		T77	9		T78	24
values[2]	5069	1			T77	1		T538	3		T541	1
values[3]	2484	1			T539	87		T796	1		T557	1
values[4]	1811	1			T539	93		T796	1		T522	1
values[5]	1327	1			T539	60		T796	1		T522	1
values[6]	1220	1			T539	35		T796	1		T522	3
values[7]	999	1			T539	31		T796	1		T522	2
values[8]	848	1			T539	13		T796	1		T522	2
values[9]	710	1			T539	14		T796	1		T522	5
values[10]	551	1			T539	6		T796	1		T522	2
values[11]	557	1			T796	1		T522	1		T786	1
values[12]	469	1			T796	1		T522	4		T786	1
values[13]	448	1			T796	1		T522	5		T786	1
values[14]	523	1			T796	1		T522	1		T786	1
values[15]	564	1			T796	1		T522	3		T786	1
values[16]	600	1			T796	1		T522	2		T786	1
values[17]	580	1			T796	1		T522	2		T786	1
values[18]	486	1			T796	1		T522	3		T786	1
values[19]	465	1			T796	1		T522	2		T786	1
values[20]	404	1			T796	1		T522	2		T786	1
values[21]	351	1			T796	1		T522	3		T786	1
values[22]	301	1			T796	1		T522	6		T786	1
values[23]	292	1			T796	1		T522	3		T786	1
values[24]	269	1			T796	1		T522	2		T786	1
values[25]	229	1			T796	1		T522	2		T786	1
values[26]	184	1			T796	1		T522	3		T786	1
values[27]	182	1			T796	1		T522	3		T786	1
values[28]	181	1			T796	1		T522	1		T786	1
values[29]	203	1			T796	1		T522	3		T786	1
values[30]	181	1			T796	1		T522	4		T786	1
values[31]	183	1			T796	1		T522	2		T786	1
values[32]	179	1			T796	1		T522	1		T786	1
values[33]	174	1			T796	1		T522	3		T786	1
values[34]	188	1			T796	1		T522	2		T786	1
values[35]	187	1			T796	1		T522	2		T786	1
values[36]	169	1			T796	1		T522	1		T786	1
values[37]	166	1			T796	1		T522	1		T786	1
values[38]	134	1			T796	1		T522	2		T786	1
values[39]	156	1			T796	1		T522	4		T786	1
values[40]	136	1			T796	1		T522	1		T786	1
values[41]	106	1			T796	1		T522	3		T786	1
values[42]	99	1			T796	1		T522	3		T786	1
values[43]	79	1			T796	1		T522	4		T786	1
values[44]	65	1			T796	1		T522	4		T786	1
values[45]	71	1			T796	1		T522	1		T786	1
values[46]	74	1			T796	1		T522	8		T786	1
values[47]	65	1			T796	1		T522	4		T786	1
values[48]	67	1			T796	1		T522	6		T786	1
values[49]	84	1			T796	1		T522	1		T786	1
values[50]	74	1			T796	1		T522	3		T786	1
values[51]	83	1			T796	1		T522	4		T786	1
values[52]	71	1			T796	1		T522	3		T786	1
values[53]	67	1			T796	1		T522	5		T786	1
values[54]	53	1			T796	1		T522	1		T786	1
values[55]	57	1			T796	1		T522	2		T786	1
values[56]	61	1			T796	1		T522	2		T786	1
values[57]	59	1			T796	1		T522	1		T786	1
values[58]	52	1			T796	1		T522	2		T786	1
values[59]	54	1			T796	1		T522	2		T786	1
values[60]	52	1			T796	1		T522	1		T786	1
values[61]	62	1			T796	1		T522	1		T786	1
values[62]	52	1			T796	1		T522	1		T786	1
values[63]	57	1			T796	1		T522	2		T786	1
values[64]	62	1			T796	1		T522	2		T786	1
values[65]	57	1			T796	1		T522	2		T786	1
values[66]	56	1			T796	1		T522	3		T786	1
values[67]	58	1			T796	1		T522	4		T786	1
values[68]	52	1			T796	1		T522	3		T786	1
values[69]	59	1			T796	1		T522	1		T786	1
values[70]	54	1			T796	1		T522	2		T786	1
values[71]	76	1			T796	1		T522	5		T786	1
values[72]	69	1			T796	1		T522	3		T786	1
values[73]	79	1			T796	1		T522	1		T786	1
values[74]	67	1			T796	1		T522	3		T786	1
values[75]	62	1			T796	1		T522	4		T786	1
values[76]	57	1			T796	1		T522	1		T786	1
values[77]	71	1			T796	1		T522	4		T786	1
values[78]	76	1			T796	1		T522	4		T786	1
values[79]	71	1			T796	1		T522	1		T786	1
values[80]	106	1			T796	1		T522	2		T786	1
values[81]	79	1			T796	1		T522	4		T786	1
values[82]	80	1			T796	1		T522	3		T786	1
values[83]	90	1			T796	1		T522	4		T786	1
values[84]	84	1			T796	1		T522	4		T786	1
values[85]	76	1			T796	3		T522	2		T786	1
values[86]	76	1			T796	1		T522	2		T786	1
values[87]	79	1			T796	3		T522	4		T786	1
values[88]	81	1			T796	3		T522	1		T786	1
values[89]	82	1			T796	1		T522	2		T786	1
values[90]	69	1			T796	1		T522	4		T786	1
values[91]	108	1			T796	1		T522	5		T786	1
values[92]	105	1			T796	3		T522	3		T786	1
values[93]	69	1			T796	3		T522	3		T786	1
values[94]	85	1			T796	6		T522	3		T786	1
values[95]	94	1			T796	5		T522	1		T786	1
values[96]	103	1			T796	1		T522	8		T786	1
values[97]	98	1			T796	4		T522	13		T786	1
values[98]	88	1			T796	2		T522	11		T786	1
values[99]	93	1			T796	2		T522	5		T786	2
values[100]	91	1			T796	3		T522	6		T786	1
values[101]	105	1			T796	1		T522	4		T786	1
values[102]	86	1			T796	2		T522	2		T786	1
values[103]	65	1			T796	1		T522	4		T786	1
values[104]	99	1			T796	2		T522	6		T786	1
values[105]	94	1			T796	3		T522	3		T786	1
values[106]	111	1			T796	1		T522	3		T786	1
values[107]	84	1			T796	1		T522	4		T786	1
values[108]	101	1			T796	2		T522	3		T786	1
values[109]	101	1			T796	2		T522	2		T786	1
values[110]	103	1			T796	4		T522	3		T786	1
values[111]	101	1			T796	2		T522	4		T786	1
values[112]	98	1			T796	1		T522	4		T786	1
values[113]	99	1			T796	2		T522	4		T786	1
values[114]	113	1			T796	10		T522	2		T786	2
values[115]	108	1			T796	3		T522	7		T786	5
values[116]	122	1			T796	2		T522	4		T786	1
values[117]	98	1			T796	1		T522	7		T786	1
values[118]	102	1			T796	1		T522	6		T786	2
values[119]	114	1			T796	1		T522	8		T786	2
values[120]	127	1			T796	2		T522	2		T786	2
values[121]	105	1			T796	2		T522	1		T786	1
values[122]	144	1			T796	4		T522	4		T786	3
values[123]	168	1			T796	1		T522	3		T786	1
values[124]	274	1			T796	1		T522	19		T786	1
values[125]	529	1			T796	1		T522	56		T786	4
values[126]	934	1			T796	18		T522	52		T786	21
values[127]	2817	1			T796	82		T522	24		T786	132
values[128]	4918	1			T796	191		T522	1		T786	213