Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	148058	1			T72	139		T73	7		T74	7
values[2]	10949	1			T72	3		T79	1		T247	16
values[3]	4133	1			T247	1		T521	1		T447	1
values[4]	2340	1			T447	1		T452	44		T532	1
values[5]	1515	1			T447	1		T452	24		T532	1
values[6]	1149	1			T447	1		T452	10		T532	1
values[7]	791	1			T447	1		T452	1		T532	1
values[8]	741	1			T447	1		T532	1		T441	5
values[9]	681	1			T447	1		T532	1		T441	12
values[10]	508	1			T447	1		T532	1		T441	4
values[11]	523	1			T447	1		T532	1		T585	1
values[12]	543	1			T447	1		T532	1		T545	21
values[13]	492	1			T447	1		T532	1		T545	9
values[14]	515	1			T447	1		T532	1		T545	11
values[15]	467	1			T447	1		T532	1		T545	12
values[16]	474	1			T447	1		T532	1		T545	16
values[17]	466	1			T447	1		T532	1		T545	14
values[18]	411	1			T447	1		T532	1		T545	14
values[19]	391	1			T447	1		T532	1		T545	24
values[20]	439	1			T447	1		T532	1		T545	13
values[21]	386	1			T447	1		T532	1		T545	18
values[22]	420	1			T447	1		T532	1		T545	15
values[23]	427	1			T447	1		T532	1		T545	11
values[24]	420	1			T447	1		T532	1		T545	19
values[25]	447	1			T447	1		T532	1		T545	17
values[26]	387	1			T447	1		T532	1		T545	15
values[27]	427	1			T447	1		T532	1		T545	12
values[28]	424	1			T447	1		T532	1		T545	14
values[29]	412	1			T447	1		T532	1		T545	13
values[30]	384	1			T447	1		T532	1		T545	10
values[31]	439	1			T447	1		T532	1		T545	19
values[32]	412	1			T447	1		T532	1		T545	24
values[33]	370	1			T447	1		T532	1		T545	22
values[34]	405	1			T447	1		T532	1		T545	9
values[35]	347	1			T447	1		T532	1		T545	6
values[36]	411	1			T447	1		T532	1		T545	13
values[37]	370	1			T447	1		T532	1		T545	9
values[38]	401	1			T447	1		T532	1		T545	20
values[39]	367	1			T447	1		T532	1		T545	18
values[40]	356	1			T447	1		T532	1		T545	17
values[41]	392	1			T447	1		T532	1		T545	9
values[42]	404	1			T447	1		T532	1		T545	11
values[43]	364	1			T447	1		T532	1		T545	9
values[44]	385	1			T447	1		T532	1		T545	5
values[45]	386	1			T447	1		T532	1		T545	2
values[46]	339	1			T447	1		T532	1		T545	5
values[47]	301	1			T447	1		T532	1		T545	3
values[48]	355	1			T447	1		T532	1		T545	5
values[49]	307	1			T447	1		T532	1		T545	7
values[50]	399	1			T447	1		T532	1		T545	11
values[51]	320	1			T447	1		T532	1		T545	5
values[52]	273	1			T447	1		T532	1		T545	12
values[53]	335	1			T447	1		T532	1		T545	10
values[54]	359	1			T447	1		T532	1		T545	24
values[55]	298	1			T447	2		T532	1		T545	4
values[56]	320	1			T447	1		T532	1		T545	7
values[57]	283	1			T447	1		T532	1		T545	13
values[58]	241	1			T447	1		T532	1		T545	6
values[59]	253	1			T447	1		T532	1		T545	3
values[60]	257	1			T447	1		T532	1		T545	6
values[61]	241	1			T447	1		T532	1		T545	5
values[62]	268	1			T447	1		T532	1		T545	7
values[63]	263	1			T447	1		T532	1		T545	6
values[64]	201	1			T447	1		T532	1		T545	6
values[65]	185	1			T447	1		T532	1		T545	5
values[66]	214	1			T447	1		T532	1		T545	12
values[67]	209	1			T447	1		T532	1		T545	6
values[68]	204	1			T447	1		T532	1		T545	7
values[69]	170	1			T447	1		T532	1		T545	6
values[70]	158	1			T447	1		T532	1		T545	6
values[71]	144	1			T447	1		T532	1		T545	11
values[72]	129	1			T447	1		T532	1		T545	11
values[73]	134	1			T447	1		T532	1		T545	10
values[74]	116	1			T447	1		T532	1		T470	10
values[75]	144	1			T447	1		T532	1		T470	20
values[76]	131	1			T447	2		T532	1		T470	18
values[77]	130	1			T447	1		T532	1		T470	25
values[78]	132	1			T447	1		T532	1		T470	20
values[79]	117	1			T447	1		T532	1		T470	9
values[80]	109	1			T447	1		T532	1		T470	4
values[81]	120	1			T447	1		T532	1		T470	4
values[82]	107	1			T447	1		T532	1		T470	2
values[83]	103	1			T447	1		T532	1		T470	1
values[84]	142	1			T447	1		T532	2		T470	11
values[85]	120	1			T447	1		T532	1		T470	5
values[86]	121	1			T447	1		T532	2		T470	10
values[87]	116	1			T447	1		T532	3		T470	3
values[88]	119	1			T447	1		T532	2		T470	4
values[89]	117	1			T447	1		T532	4		T470	3
values[90]	112	1			T447	1		T532	6		T470	1
values[91]	100	1			T447	1		T532	3		T470	7
values[92]	106	1			T447	1		T532	2		T470	12
values[93]	111	1			T447	1		T532	4		T470	12
values[94]	135	1			T447	1		T532	2		T470	6
values[95]	108	1			T447	1		T532	1		T470	6
values[96]	116	1			T447	1		T532	1		T470	4
values[97]	113	1			T447	1		T532	8		T470	5
values[98]	83	1			T447	1		T532	1		T470	4
values[99]	97	1			T447	1		T532	1		T470	6
values[100]	112	1			T447	1		T532	3		T470	6
values[101]	94	1			T447	1		T532	2		T470	4
values[102]	104	1			T447	1		T532	1		T470	6
values[103]	103	1			T447	1		T532	1		T470	9
values[104]	118	1			T447	1		T532	5		T470	9
values[105]	104	1			T447	2		T532	1		T470	4
values[106]	101	1			T447	1		T532	2		T470	8
values[107]	95	1			T447	1		T532	1		T470	1
values[108]	77	1			T447	2		T532	2		T796	4
values[109]	100	1			T447	4		T532	1		T796	8
values[110]	111	1			T447	1		T532	4		T796	5
values[111]	96	1			T447	4		T532	1		T796	8
values[112]	91	1			T447	1		T532	6		T796	11
values[113]	116	1			T447	3		T532	5		T796	8
values[114]	113	1			T447	4		T532	3		T796	8
values[115]	90	1			T447	2		T532	2		T796	3
values[116]	84	1			T447	2		T532	1		T796	1
values[117]	78	1			T447	1		T532	2		T796	9
values[118]	83	1			T447	1		T532	3		T796	3
values[119]	79	1			T447	6		T532	2		T782	1
values[120]	86	1			T447	6		T532	3		T782	2
values[121]	76	1			T447	8		T532	4		T782	1
values[122]	68	1			T447	2		T532	2		T782	1
values[123]	69	1			T447	2		T532	2		T782	1
values[124]	70	1			T447	2		T532	3		T782	1
values[125]	96	1			T447	1		T532	1		T782	3
values[126]	235	1			T447	1		T532	2		T782	2
values[127]	928	1			T447	27		T532	31		T782	24
values[128]	6466	1			T447	277		T532	293		T782	265