Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.keymgr_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	169755	1			T72	133		T73	5		T74	5
values[2]	4698	1			T534	2		T491	3		T521	2
values[3]	2081	1			T537	1		T532	1		T479	24
values[4]	1380	1			T537	1		T532	1		T479	3
values[5]	1009	1			T537	1		T532	1		T448	4
values[6]	851	1			T537	1		T532	1		T448	5
values[7]	829	1			T537	1		T532	1		T448	3
values[8]	767	1			T537	1		T532	1		T448	4
values[9]	728	1			T537	1		T532	1		T448	3
values[10]	710	1			T537	1		T532	1		T448	1
values[11]	547	1			T537	1		T532	1		T448	7
values[12]	519	1			T537	1		T532	1		T448	7
values[13]	433	1			T537	1		T532	1		T448	7
values[14]	398	1			T537	1		T532	1		T448	7
values[15]	378	1			T537	1		T532	1		T448	5
values[16]	361	1			T537	1		T532	1		T448	6
values[17]	366	1			T537	1		T532	1		T448	5
values[18]	307	1			T537	1		T532	1		T448	5
values[19]	296	1			T537	1		T532	1		T448	4
values[20]	386	1			T537	1		T532	1		T448	2
values[21]	392	1			T537	1		T532	1		T448	4
values[22]	344	1			T537	1		T532	1		T448	3
values[23]	281	1			T537	1		T532	1		T448	2
values[24]	281	1			T537	1		T532	1		T448	4
values[25]	299	1			T537	1		T532	1		T448	3
values[26]	251	1			T537	1		T532	1		T448	10
values[27]	258	1			T537	1		T532	1		T448	10
values[28]	247	1			T537	1		T532	1		T448	14
values[29]	208	1			T537	1		T532	1		T448	24
values[30]	167	1			T537	1		T532	1		T448	15
values[31]	204	1			T537	1		T532	1		T448	11
values[32]	190	1			T537	1		T532	1		T448	4
values[33]	214	1			T537	1		T532	1		T448	16
values[34]	188	1			T537	1		T532	1		T448	7
values[35]	216	1			T537	1		T532	1		T448	4
values[36]	178	1			T537	1		T532	1		T448	8
values[37]	154	1			T537	1		T532	1		T448	27
values[38]	163	1			T537	1		T532	1		T448	19
values[39]	147	1			T537	1		T532	1		T448	25
values[40]	138	1			T537	1		T532	1		T448	23
values[41]	173	1			T537	1		T532	1		T448	42
values[42]	131	1			T537	1		T532	1		T448	30
values[43]	127	1			T537	1		T532	1		T448	35
values[44]	134	1			T537	1		T532	1		T448	20
values[45]	148	1			T537	1		T532	1		T448	13
values[46]	135	1			T537	1		T532	1		T448	11
values[47]	162	1			T537	1		T532	1		T448	21
values[48]	120	1			T537	1		T532	1		T448	9
values[49]	77	1			T537	1		T532	1		T448	2
values[50]	79	1			T537	1		T532	1		T448	1
values[51]	106	1			T537	1		T532	1		T796	3
values[52]	87	1			T537	1		T532	1		T796	2
values[53]	67	1			T537	1		T532	1		T796	2
values[54]	66	1			T537	1		T532	1		T796	5
values[55]	70	1			T537	1		T532	1		T796	6
values[56]	60	1			T537	1		T532	1		T796	4
values[57]	57	1			T537	1		T532	1		T796	4
values[58]	61	1			T537	1		T532	1		T796	7
values[59]	58	1			T537	1		T532	1		T796	3
values[60]	63	1			T537	1		T532	1		T796	3
values[61]	51	1			T537	1		T532	1		T796	4
values[62]	59	1			T537	1		T532	1		T796	1
values[63]	57	1			T537	1		T532	1		T796	2
values[64]	57	1			T537	1		T532	1		T796	1
values[65]	59	1			T537	1		T532	1		T796	1
values[66]	67	1			T537	1		T532	1		T796	5
values[67]	66	1			T537	1		T532	1		T796	6
values[68]	57	1			T537	1		T532	1		T796	2
values[69]	68	1			T537	1		T532	1		T796	2
values[70]	68	1			T537	1		T532	1		T796	2
values[71]	62	1			T537	1		T532	1		T796	1
values[72]	78	1			T537	1		T532	1		T796	7
values[73]	88	1			T537	1		T532	1		T796	7
values[74]	49	1			T537	1		T532	1		T796	1
values[75]	57	1			T537	1		T532	1		T796	2
values[76]	73	1			T537	1		T532	1		T796	1
values[77]	68	1			T537	1		T532	1		T796	2
values[78]	56	1			T537	1		T532	1		T796	2
values[79]	67	1			T537	2		T532	1		T796	2
values[80]	64	1			T537	1		T532	1		T796	5
values[81]	71	1			T537	1		T532	1		T796	7
values[82]	77	1			T537	1		T532	5		T796	2
values[83]	97	1			T537	1		T532	3		T796	4
values[84]	70	1			T537	1		T532	1		T796	5
values[85]	77	1			T537	1		T532	3		T796	6
values[86]	79	1			T537	1		T532	4		T796	1
values[87]	79	1			T537	1		T532	7		T796	2
values[88]	91	1			T537	1		T532	9		T796	3
values[89]	75	1			T537	1		T532	3		T796	6
values[90]	86	1			T537	1		T532	3		T796	5
values[91]	90	1			T537	1		T532	2		T796	5
values[92]	79	1			T537	1		T532	2		T796	3
values[93]	89	1			T537	1		T532	2		T796	3
values[94]	85	1			T537	1		T532	1		T796	1
values[95]	83	1			T537	1		T532	4		T796	5
values[96]	106	1			T537	1		T532	2		T796	7
values[97]	84	1			T537	1		T532	1		T796	6
values[98]	82	1			T537	1		T532	3		T796	2
values[99]	94	1			T537	1		T532	2		T796	1
values[100]	78	1			T537	1		T532	1		T796	2
values[101]	86	1			T537	1		T532	3		T796	2
values[102]	80	1			T537	1		T532	2		T796	1
values[103]	95	1			T537	1		T532	2		T796	2
values[104]	92	1			T537	1		T532	2		T796	1
values[105]	92	1			T537	1		T532	2		T796	6
values[106]	99	1			T537	1		T532	2		T796	7
values[107]	125	1			T537	1		T532	1		T796	5
values[108]	96	1			T537	1		T532	3		T796	4
values[109]	114	1			T537	1		T532	6		T796	3
values[110]	100	1			T537	1		T532	1		T796	5
values[111]	83	1			T537	1		T532	1		T796	5
values[112]	121	1			T537	1		T532	1		T796	5
values[113]	97	1			T537	1		T532	2		T796	2
values[114]	98	1			T537	1		T532	4		T796	3
values[115]	90	1			T537	1		T532	3		T796	7
values[116]	108	1			T537	1		T532	1		T796	4
values[117]	102	1			T537	1		T532	7		T796	5
values[118]	97	1			T537	1		T532	4		T796	2
values[119]	115	1			T537	1		T532	2		T796	8
values[120]	130	1			T537	1		T532	5		T796	9
values[121]	125	1			T537	1		T532	1		T796	12
values[122]	122	1			T537	1		T532	2		T796	6
values[123]	160	1			T537	1		T532	2		T796	11
values[124]	201	1			T537	2		T532	1		T796	5
values[125]	322	1			T537	5		T532	5		T796	11
values[126]	771	1			T537	34		T532	23		T796	36
values[127]	2881	1			T537	148		T532	117		T796	17
values[128]	4840	1			T537	212		T532	159		T796	1