Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	147539	1			T72	142		T73	13		T74	7
values[2]	11112	1			T247	10		T248	9		T538	1
values[3]	5284	1			T248	9		T537	1		T539	9
values[4]	2879	1			T537	1		T539	10		T441	7
values[5]	1697	1			T537	1		T539	8		T441	13
values[6]	1122	1			T537	1		T539	8		T441	17
values[7]	837	1			T537	1		T539	13		T441	6
values[8]	665	1			T537	1		T539	5		T441	13
values[9]	643	1			T537	1		T539	14		T441	12
values[10]	580	1			T537	1		T539	11		T441	11
values[11]	578	1			T537	1		T539	5		T441	10
values[12]	568	1			T537	1		T539	5		T441	8
values[13]	564	1			T537	1		T539	23		T441	9
values[14]	546	1			T537	1		T539	7		T441	6
values[15]	512	1			T537	1		T539	7		T441	3
values[16]	524	1			T537	1		T539	18		T441	9
values[17]	495	1			T537	1		T539	5		T441	10
values[18]	481	1			T537	1		T539	6		T441	5
values[19]	495	1			T537	1		T539	6		T441	4
values[20]	506	1			T537	1		T539	10		T441	37
values[21]	481	1			T537	1		T539	11		T441	9
values[22]	442	1			T537	1		T539	5		T441	6
values[23]	515	1			T537	1		T539	2		T441	12
values[24]	488	1			T537	1		T441	5		T676	9
values[25]	436	1			T537	1		T441	9		T676	4
values[26]	477	1			T537	1		T441	19		T676	10
values[27]	476	1			T537	1		T441	8		T676	12
values[28]	388	1			T537	1		T441	9		T676	14
values[29]	398	1			T537	1		T441	7		T676	5
values[30]	416	1			T537	1		T441	16		T676	7
values[31]	428	1			T537	1		T441	11		T676	6
values[32]	482	1			T537	1		T441	11		T676	5
values[33]	471	1			T537	1		T441	17		T676	8
values[34]	459	1			T537	1		T441	9		T676	10
values[35]	418	1			T537	1		T441	7		T676	14
values[36]	401	1			T537	1		T441	17		T676	9
values[37]	422	1			T537	1		T441	12		T676	8
values[38]	369	1			T537	1		T441	13		T676	5
values[39]	354	1			T537	1		T441	4		T676	5
values[40]	381	1			T537	1		T441	9		T676	12
values[41]	465	1			T537	1		T441	33		T676	5
values[42]	405	1			T537	1		T441	12		T676	15
values[43]	285	1			T537	1		T441	6		T676	16
values[44]	338	1			T537	1		T441	5		T676	19
values[45]	290	1			T537	1		T676	6		T790	15
values[46]	377	1			T537	1		T676	10		T790	19
values[47]	279	1			T537	1		T676	7		T790	6
values[48]	254	1			T537	1		T676	4		T790	6
values[49]	182	1			T537	1		T676	5		T790	11
values[50]	164	1			T537	1		T676	7		T558	2
values[51]	170	1			T537	1		T676	3		T558	2
values[52]	168	1			T537	1		T676	4		T558	4
values[53]	129	1			T537	1		T676	4		T558	1
values[54]	103	1			T537	1		T676	6		T558	3
values[55]	103	1			T537	1		T676	9		T558	3
values[56]	89	1			T537	2		T676	30		T558	3
values[57]	87	1			T537	1		T676	23		T558	9
values[58]	74	1			T537	1		T558	7		T807	18
values[59]	47	1			T537	1		T558	1		T807	1
values[60]	42	1			T537	1		T558	4		T792	1
values[61]	45	1			T537	1		T558	1		T792	1
values[62]	47	1			T537	1		T558	4		T792	1
values[63]	61	1			T537	1		T558	1		T792	1
values[64]	60	1			T537	1		T558	7		T792	1
values[65]	35	1			T537	1		T558	3		T792	1
values[66]	46	1			T537	1		T558	1		T792	1
values[67]	53	1			T537	1		T558	9		T792	1
values[68]	45	1			T537	1		T558	5		T792	1
values[69]	58	1			T537	1		T558	17		T792	1
values[70]	68	1			T537	1		T558	10		T792	1
values[71]	72	1			T537	1		T558	9		T792	1
values[72]	67	1			T537	1		T558	13		T792	1
values[73]	79	1			T537	1		T558	11		T792	1
values[74]	61	1			T537	1		T558	13		T792	1
values[75]	50	1			T537	1		T558	2		T792	1
values[76]	74	1			T537	1		T558	5		T792	1
values[77]	53	1			T537	1		T558	14		T792	2
values[78]	61	1			T537	1		T558	8		T792	1
values[79]	47	1			T537	1		T558	4		T792	1
values[80]	48	1			T537	1		T558	9		T792	1
values[81]	65	1			T537	1		T558	12		T792	4
values[82]	59	1			T537	1		T558	7		T792	1
values[83]	52	1			T537	1		T558	5		T792	3
values[84]	40	1			T537	1		T558	1		T792	3
values[85]	46	1			T537	1		T558	5		T792	2
values[86]	44	1			T537	1		T558	8		T792	1
values[87]	41	1			T537	2		T558	8		T792	2
values[88]	44	1			T537	2		T558	3		T792	3
values[89]	44	1			T537	2		T558	3		T792	3
values[90]	57	1			T537	2		T558	4		T792	2
values[91]	63	1			T537	3		T558	5		T792	2
values[92]	57	1			T537	1		T558	4		T792	1
values[93]	36	1			T537	3		T558	2		T792	1
values[94]	63	1			T537	3		T558	5		T792	2
values[95]	68	1			T537	6		T558	4		T792	1
values[96]	50	1			T537	4		T558	1		T792	1
values[97]	48	1			T537	1		T558	2		T792	2
values[98]	46	1			T537	2		T558	6		T792	2
values[99]	54	1			T537	1		T558	5		T792	2
values[100]	42	1			T537	2		T558	3		T792	2
values[101]	50	1			T537	6		T558	7		T792	2
values[102]	60	1			T537	2		T558	10		T792	2
values[103]	61	1			T537	6		T558	23		T792	1
values[104]	62	1			T537	2		T558	25		T792	2
values[105]	38	1			T537	1		T558	6		T792	2
values[106]	53	1			T537	2		T558	10		T792	3
values[107]	48	1			T537	3		T558	7		T792	5
values[108]	54	1			T537	4		T558	3		T792	5
values[109]	51	1			T537	1		T558	6		T792	6
values[110]	46	1			T537	1		T558	12		T792	1
values[111]	54	1			T537	1		T558	10		T792	1
values[112]	57	1			T537	1		T558	5		T792	2
values[113]	52	1			T537	1		T558	10		T792	1
values[114]	65	1			T537	4		T558	4		T792	1
values[115]	42	1			T537	1		T558	1		T792	3
values[116]	37	1			T537	2		T792	2		T563	2
values[117]	42	1			T537	1		T792	3		T563	3
values[118]	39	1			T537	2		T792	1		T563	2
values[119]	35	1			T537	2		T792	2		T563	2
values[120]	37	1			T537	1		T792	1		T563	3
values[121]	35	1			T537	3		T792	1		T563	3
values[122]	41	1			T537	1		T792	1		T563	9
values[123]	47	1			T537	2		T792	1		T563	6
values[124]	44	1			T537	3		T792	2		T563	3
values[125]	27	1			T537	1		T792	1		T563	1
values[126]	65	1			T537	4		T792	5		T563	4
values[127]	794	1			T537	66		T792	46		T563	47
values[128]	3694	1			T537	260		T792	207		T563	279