Summary for Variable cp_req_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_req_dly

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
big_delay 500 1 T74 1 T538 1 T534 1
small_delay 658 1 T73 1 T80 1 T247 1
zero 642 1 T72 1 T79 1 T235 1



Summary for Variable cp_rsp_dly

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_rsp_dly

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
big_delay 200 1 T534 1 T491 1 T521 1
small_delay 958 1 T73 1 T74 1 T80 1
zero 642 1 T72 1 T79 1 T235 1