Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141051	1			T73	103		T74	6		T75	5
values[2]	10777	1			T73	1		T74	1		T75	1
values[3]	4419	1			T528	1		T524	30		T400	32
values[4]	2657	1			T528	1		T524	23		T400	15
values[5]	1875	1			T528	1		T524	25		T400	2
values[6]	1323	1			T528	1		T524	26		T400	4
values[7]	1028	1			T528	1		T524	21		T400	19
values[8]	809	1			T528	1		T524	17		T400	7
values[9]	623	1			T528	1		T524	7		T400	5
values[10]	477	1			T528	1		T524	5		T400	8
values[11]	467	1			T528	1		T524	6		T400	9
values[12]	384	1			T528	1		T524	5		T400	3
values[13]	329	1			T528	1		T524	6		T400	9
values[14]	305	1			T528	1		T524	7		T400	9
values[15]	314	1			T528	1		T524	3		T400	8
values[16]	323	1			T528	1		T524	7		T400	4
values[17]	289	1			T528	1		T524	8		T400	12
values[18]	297	1			T528	1		T524	7		T400	19
values[19]	291	1			T528	1		T524	1		T400	5
values[20]	289	1			T528	1		T524	1		T400	11
values[21]	278	1			T528	1		T524	3		T400	9
values[22]	249	1			T528	1		T524	4		T400	8
values[23]	308	1			T528	1		T524	4		T400	7
values[24]	294	1			T528	1		T524	1		T400	8
values[25]	257	1			T528	1		T524	3		T400	8
values[26]	275	1			T528	1		T524	6		T400	11
values[27]	243	1			T528	1		T524	7		T400	19
values[28]	237	1			T528	1		T524	4		T400	9
values[29]	246	1			T528	1		T524	5		T400	9
values[30]	256	1			T528	1		T524	5		T400	9
values[31]	258	1			T528	1		T524	3		T400	4
values[32]	252	1			T528	1		T524	2		T400	11
values[33]	275	1			T528	1		T524	3		T400	16
values[34]	299	1			T528	1		T524	6		T400	8
values[35]	246	1			T528	1		T400	9		T537	8
values[36]	270	1			T528	1		T400	4		T537	6
values[37]	234	1			T528	1		T400	4		T537	2
values[38]	224	1			T528	1		T400	7		T537	6
values[39]	227	1			T528	1		T400	6		T537	17
values[40]	222	1			T528	1		T400	2		T537	14
values[41]	230	1			T528	1		T400	14		T537	13
values[42]	234	1			T528	1		T400	22		T537	11
values[43]	231	1			T528	1		T400	4		T537	8
values[44]	262	1			T528	1		T400	5		T537	3
values[45]	278	1			T528	1		T400	15		T537	3
values[46]	198	1			T528	1		T400	3		T537	2
values[47]	169	1			T528	1		T400	8		T537	8
values[48]	231	1			T528	1		T400	7		T537	9
values[49]	218	1			T528	1		T400	18		T537	8
values[50]	181	1			T528	1		T400	4		T537	5
values[51]	213	1			T528	1		T400	10		T537	8
values[52]	218	1			T528	1		T400	5		T537	16
values[53]	191	1			T528	1		T400	5		T537	9
values[54]	225	1			T528	1		T400	5		T537	4
values[55]	218	1			T528	1		T400	5		T537	7
values[56]	181	1			T528	1		T400	10		T537	8
values[57]	204	1			T528	1		T400	4		T537	11
values[58]	142	1			T528	1		T400	6		T537	4
values[59]	165	1			T528	1		T400	4		T537	10
values[60]	188	1			T528	1		T400	5		T537	9
values[61]	158	1			T528	1		T400	7		T537	4
values[62]	182	1			T528	1		T400	4		T537	11
values[63]	140	1			T528	1		T400	5		T537	18
values[64]	135	1			T528	1		T400	6		T537	4
values[65]	122	1			T528	1		T400	5		T537	4
values[66]	135	1			T528	1		T537	8		T787	1
values[67]	131	1			T528	1		T537	9		T787	1
values[68]	122	1			T528	1		T537	24		T787	1
values[69]	128	1			T528	1		T537	22		T787	1
values[70]	149	1			T528	1		T537	15		T787	1
values[71]	135	1			T528	1		T537	19		T787	1
values[72]	158	1			T528	1		T537	16		T787	1
values[73]	135	1			T528	1		T537	10		T787	1
values[74]	129	1			T528	1		T537	19		T787	1
values[75]	100	1			T528	1		T537	11		T787	1
values[76]	98	1			T528	1		T537	12		T787	1
values[77]	94	1			T528	1		T537	8		T787	1
values[78]	114	1			T528	1		T537	13		T787	1
values[79]	92	1			T528	1		T537	13		T787	1
values[80]	110	1			T528	1		T537	7		T787	1
values[81]	80	1			T528	1		T537	9		T787	1
values[82]	91	1			T528	1		T537	17		T787	1
values[83]	78	1			T528	1		T537	11		T787	1
values[84]	76	1			T528	1		T537	7		T787	1
values[85]	77	1			T528	1		T537	4		T787	1
values[86]	73	1			T528	1		T537	4		T787	1
values[87]	92	1			T528	1		T537	5		T787	1
values[88]	86	1			T528	1		T537	6		T787	1
values[89]	78	1			T528	1		T537	6		T787	1
values[90]	91	1			T528	1		T537	3		T787	2
values[91]	74	1			T528	1		T537	4		T787	1
values[92]	90	1			T528	1		T537	3		T787	1
values[93]	101	1			T528	1		T537	3		T787	1
values[94]	70	1			T528	1		T537	3		T787	1
values[95]	73	1			T528	2		T537	1		T787	1
values[96]	79	1			T528	1		T537	3		T787	1
values[97]	102	1			T528	1		T537	9		T787	1
values[98]	109	1			T528	5		T537	7		T787	1
values[99]	80	1			T528	4		T537	5		T787	1
values[100]	86	1			T528	1		T537	2		T787	1
values[101]	74	1			T528	1		T787	1		T638	2
values[102]	76	1			T528	2		T787	1		T638	1
values[103]	79	1			T528	2		T787	1		T638	5
values[104]	64	1			T528	4		T787	1		T638	7
values[105]	61	1			T528	1		T787	1		T638	5
values[106]	69	1			T528	3		T787	1		T638	3
values[107]	91	1			T528	1		T787	3		T638	4
values[108]	95	1			T528	2		T787	9		T638	2
values[109]	73	1			T528	1		T787	1		T638	1
values[110]	69	1			T528	1		T787	6		T638	3
values[111]	77	1			T528	1		T787	2		T638	1
values[112]	90	1			T528	1		T787	5		T638	1
values[113]	68	1			T528	1		T787	1		T638	2
values[114]	71	1			T528	4		T787	1		T638	2
values[115]	62	1			T528	4		T787	5		T638	1
values[116]	63	1			T528	2		T787	2		T638	1
values[117]	79	1			T528	2		T787	4		T638	2
values[118]	65	1			T528	2		T787	3		T638	1
values[119]	72	1			T528	1		T787	2		T638	1
values[120]	79	1			T528	4		T787	1		T638	3
values[121]	84	1			T528	1		T787	1		T638	6
values[122]	77	1			T528	1		T787	1		T638	3
values[123]	70	1			T528	1		T787	4		T638	1
values[124]	58	1			T528	2		T787	2		T638	2
values[125]	76	1			T528	2		T787	1		T638	15
values[126]	160	1			T528	2		T787	1		T638	36
values[127]	875	1			T528	30		T787	26		T638	82
values[128]	6088	1			T528	267		T787	308		T638	47