Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart2_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	144442	1			T73	83		T74	3		T75	4
values[2]	12151	1			T73	1		T75	1		T117	1
values[3]	5093	1			T226	1		T488	1		T632	8
values[4]	2816	1			T632	19		T455	16		T637	17
values[5]	1765	1			T632	12		T455	9		T637	15
values[6]	1279	1			T632	14		T455	23		T637	14
values[7]	904	1			T632	11		T455	20		T637	5
values[8]	653	1			T632	14		T455	13		T637	10
values[9]	556	1			T632	14		T455	20		T637	4
values[10]	521	1			T632	12		T455	8		T637	4
values[11]	373	1			T632	10		T455	16		T637	1
values[12]	342	1			T632	10		T455	13		T558	3
values[13]	375	1			T632	15		T455	27		T558	6
values[14]	322	1			T632	23		T455	11		T558	2
values[15]	292	1			T632	14		T455	7		T558	2
values[16]	282	1			T632	23		T455	14		T558	2
values[17]	326	1			T632	9		T455	28		T558	2
values[18]	250	1			T632	13		T455	12		T558	1
values[19]	271	1			T632	14		T455	10		T558	2
values[20]	285	1			T632	16		T455	16		T558	2
values[21]	275	1			T632	12		T455	12		T558	2
values[22]	264	1			T632	12		T455	14		T558	5
values[23]	255	1			T632	15		T455	13		T558	4
values[24]	255	1			T632	13		T455	23		T558	2
values[25]	307	1			T632	19		T455	31		T558	3
values[26]	304	1			T632	20		T455	8		T558	6
values[27]	269	1			T632	24		T455	18		T558	9
values[28]	275	1			T632	16		T455	18		T558	4
values[29]	305	1			T632	17		T455	21		T558	1
values[30]	277	1			T632	27		T455	16		T558	2
values[31]	250	1			T632	8		T455	14		T558	11
values[32]	265	1			T632	16		T455	18		T558	4
values[33]	253	1			T632	11		T455	9		T788	2
values[34]	278	1			T632	16		T455	9		T788	13
values[35]	207	1			T632	7		T455	22		T788	4
values[36]	280	1			T632	14		T455	13		T788	1
values[37]	244	1			T632	13		T455	19		T788	6
values[38]	266	1			T632	13		T455	27		T788	3
values[39]	220	1			T632	14		T455	17		T788	2
values[40]	213	1			T632	16		T455	9		T788	3
values[41]	218	1			T632	12		T455	20		T788	2
values[42]	223	1			T632	9		T455	13		T788	2
values[43]	239	1			T632	11		T455	11		T788	1
values[44]	237	1			T632	19		T455	13		T788	5
values[45]	192	1			T632	15		T455	9		T788	2
values[46]	250	1			T632	40		T455	11		T788	1
values[47]	257	1			T632	23		T455	11		T788	3
values[48]	216	1			T632	13		T455	24		T788	1
values[49]	231	1			T632	12		T455	11		T788	1
values[50]	209	1			T632	16		T455	9		T788	1
values[51]	186	1			T632	14		T455	10		T788	3
values[52]	204	1			T632	12		T455	8		T788	1
values[53]	202	1			T632	13		T455	18		T788	4
values[54]	184	1			T632	6		T455	10		T788	2
values[55]	209	1			T632	13		T455	17		T788	2
values[56]	191	1			T632	10		T455	18		T788	2
values[57]	153	1			T632	9		T455	16		T788	1
values[58]	166	1			T632	8		T455	21		T788	2
values[59]	187	1			T632	11		T455	11		T788	1
values[60]	166	1			T632	21		T455	22		T788	1
values[61]	164	1			T632	16		T455	8		T788	2
values[62]	165	1			T632	6		T455	9		T788	1
values[63]	172	1			T632	13		T455	4		T788	2
values[64]	163	1			T632	3		T455	14		T788	3
values[65]	156	1			T632	15		T455	7		T788	2
values[66]	162	1			T632	26		T455	6		T788	5
values[67]	143	1			T632	3		T455	14		T788	3
values[68]	123	1			T632	3		T455	8		T788	1
values[69]	112	1			T632	4		T455	5		T788	3
values[70]	118	1			T632	3		T455	5		T788	8
values[71]	106	1			T455	8		T788	3		T802	1
values[72]	85	1			T455	10		T788	4		T802	1
values[73]	69	1			T455	4		T788	4		T802	1
values[74]	70	1			T455	3		T788	3		T802	1
values[75]	68	1			T788	6		T802	1		T789	1
values[76]	75	1			T788	8		T802	1		T789	1
values[77]	67	1			T788	5		T802	1		T789	1
values[78]	76	1			T788	6		T802	1		T789	1
values[79]	59	1			T788	4		T802	1		T789	1
values[80]	66	1			T788	1		T802	1		T789	1
values[81]	61	1			T788	2		T802	1		T789	1
values[82]	72	1			T788	2		T802	1		T789	1
values[83]	59	1			T788	2		T802	1		T789	1
values[84]	62	1			T788	2		T802	1		T789	1
values[85]	58	1			T788	3		T802	1		T789	1
values[86]	57	1			T788	2		T802	1		T789	1
values[87]	57	1			T788	1		T802	1		T789	1
values[88]	70	1			T788	4		T802	1		T789	1
values[89]	77	1			T788	1		T802	1		T789	1
values[90]	67	1			T788	2		T802	1		T789	1
values[91]	65	1			T788	3		T802	1		T789	1
values[92]	57	1			T788	1		T802	1		T789	1
values[93]	45	1			T788	1		T802	1		T789	1
values[94]	66	1			T788	1		T802	1		T789	1
values[95]	54	1			T788	2		T802	1		T789	1
values[96]	58	1			T788	2		T802	1		T789	1
values[97]	57	1			T788	3		T802	1		T789	1
values[98]	50	1			T788	4		T802	1		T789	1
values[99]	65	1			T788	10		T802	1		T789	1
values[100]	68	1			T788	5		T802	1		T789	1
values[101]	39	1			T788	3		T802	1		T789	1
values[102]	48	1			T788	2		T802	1		T789	1
values[103]	53	1			T788	4		T802	1		T789	1
values[104]	59	1			T788	6		T802	1		T789	1
values[105]	61	1			T788	1		T802	2		T789	1
values[106]	52	1			T788	1		T802	1		T789	1
values[107]	51	1			T788	1		T802	4		T789	1
values[108]	60	1			T788	2		T802	3		T789	1
values[109]	61	1			T788	3		T802	3		T789	2
values[110]	58	1			T788	6		T802	1		T789	1
values[111]	61	1			T788	4		T802	2		T789	1
values[112]	70	1			T788	1		T802	4		T789	1
values[113]	66	1			T788	4		T802	1		T789	1
values[114]	85	1			T788	2		T802	5		T789	1
values[115]	58	1			T788	1		T802	2		T789	1
values[116]	47	1			T788	2		T802	3		T789	1
values[117]	62	1			T788	6		T802	1		T789	1
values[118]	69	1			T788	4		T802	2		T789	1
values[119]	62	1			T788	3		T802	2		T789	1
values[120]	47	1			T788	4		T802	1		T789	1
values[121]	47	1			T788	2		T802	2		T789	1
values[122]	47	1			T788	1		T802	1		T789	1
values[123]	46	1			T788	4		T802	7		T789	1
values[124]	58	1			T788	1		T802	1		T789	1
values[125]	70	1			T788	3		T802	1		T789	1
values[126]	102	1			T788	6		T802	1		T789	1
values[127]	641	1			T788	36		T802	36		T789	43
values[128]	5136	1			T788	32		T802	270		T789	289