Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart3_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141172	1			T73	84		T74	3		T75	3
values[2]	9393	1			T73	1		T75	1		T117	2
values[3]	3744	1			T781	1		T524	19		T632	17
values[4]	2177	1			T781	1		T524	7		T632	14
values[5]	1376	1			T781	1		T524	3		T632	17
values[6]	976	1			T781	1		T524	2		T632	13
values[7]	759	1			T781	1		T632	14		T400	4
values[8]	594	1			T781	1		T632	17		T400	4
values[9]	471	1			T781	1		T632	15		T400	16
values[10]	453	1			T781	1		T632	8		T400	6
values[11]	371	1			T781	1		T632	20		T400	6
values[12]	312	1			T781	1		T632	14		T400	5
values[13]	333	1			T781	1		T632	15		T400	11
values[14]	306	1			T781	1		T632	14		T400	10
values[15]	291	1			T781	1		T632	15		T400	8
values[16]	335	1			T781	1		T632	20		T400	7
values[17]	378	1			T781	1		T632	9		T400	7
values[18]	261	1			T781	1		T632	11		T400	4
values[19]	283	1			T781	1		T632	7		T400	8
values[20]	272	1			T781	1		T632	8		T400	7
values[21]	318	1			T781	1		T632	29		T400	10
values[22]	300	1			T781	1		T632	27		T400	5
values[23]	315	1			T781	1		T632	24		T400	6
values[24]	311	1			T781	1		T632	13		T400	4
values[25]	307	1			T781	1		T632	20		T400	7
values[26]	276	1			T781	1		T632	12		T400	3
values[27]	267	1			T781	1		T632	16		T400	5
values[28]	290	1			T781	1		T632	11		T400	9
values[29]	289	1			T781	1		T632	15		T400	16
values[30]	267	1			T781	1		T632	16		T400	9
values[31]	320	1			T781	1		T632	12		T400	3
values[32]	329	1			T781	1		T632	12		T400	3
values[33]	321	1			T781	1		T632	14		T400	8
values[34]	279	1			T781	1		T632	16		T400	4
values[35]	301	1			T781	1		T632	13		T400	7
values[36]	244	1			T781	1		T632	18		T400	5
values[37]	289	1			T781	1		T632	8		T400	10
values[38]	285	1			T781	1		T632	23		T400	30
values[39]	334	1			T781	1		T632	20		T400	12
values[40]	278	1			T781	1		T632	14		T400	2
values[41]	285	1			T781	1		T632	21		T400	7
values[42]	303	1			T781	1		T632	28		T400	3
values[43]	270	1			T781	1		T632	22		T400	6
values[44]	283	1			T781	1		T632	29		T400	7
values[45]	237	1			T781	1		T632	10		T400	2
values[46]	258	1			T781	1		T632	16		T400	8
values[47]	288	1			T781	1		T632	20		T400	5
values[48]	256	1			T781	1		T632	8		T400	8
values[49]	316	1			T781	1		T632	13		T400	13
values[50]	263	1			T781	1		T632	14		T400	6
values[51]	245	1			T781	1		T632	12		T400	4
values[52]	247	1			T781	1		T632	14		T400	17
values[53]	231	1			T781	1		T632	11		T400	13
values[54]	253	1			T781	1		T632	11		T400	6
values[55]	208	1			T781	1		T632	10		T400	3
values[56]	196	1			T781	1		T632	10		T400	5
values[57]	216	1			T781	1		T632	15		T400	4
values[58]	214	1			T781	1		T632	13		T400	3
values[59]	209	1			T781	1		T632	10		T400	4
values[60]	224	1			T781	1		T632	10		T400	9
values[61]	197	1			T781	1		T632	5		T400	5
values[62]	181	1			T781	1		T632	3		T400	4
values[63]	230	1			T781	1		T632	6		T400	3
values[64]	156	1			T781	1		T632	8		T400	3
values[65]	201	1			T781	1		T632	8		T400	7
values[66]	205	1			T781	1		T632	2		T400	6
values[67]	208	1			T781	1		T632	8		T537	7
values[68]	203	1			T781	1		T632	6		T537	6
values[69]	172	1			T781	1		T632	9		T537	13
values[70]	178	1			T781	2		T632	3		T537	15
values[71]	171	1			T781	1		T632	9		T537	16
values[72]	121	1			T781	1		T632	4		T537	9
values[73]	120	1			T781	1		T632	5		T537	6
values[74]	111	1			T781	1		T632	4		T537	9
values[75]	101	1			T781	1		T632	14		T537	6
values[76]	73	1			T781	1		T632	3		T537	2
values[77]	71	1			T781	1		T537	9		T777	1
values[78]	65	1			T781	1		T537	8		T777	1
values[79]	76	1			T781	1		T537	4		T777	1
values[80]	85	1			T781	1		T537	9		T777	1
values[81]	80	1			T781	1		T537	13		T777	1
values[82]	64	1			T781	1		T537	4		T777	1
values[83]	60	1			T781	1		T537	7		T777	1
values[84]	57	1			T781	1		T537	3		T777	1
values[85]	79	1			T781	1		T537	5		T777	1
values[86]	87	1			T781	1		T537	6		T777	1
values[87]	84	1			T781	1		T537	12		T777	1
values[88]	79	1			T781	1		T537	12		T777	1
values[89]	93	1			T781	1		T537	8		T777	1
values[90]	49	1			T781	1		T537	4		T777	1
values[91]	71	1			T781	1		T537	5		T777	1
values[92]	63	1			T781	1		T537	1		T777	1
values[93]	61	1			T781	1		T537	4		T777	1
values[94]	70	1			T781	1		T537	2		T777	1
values[95]	70	1			T781	1		T537	4		T777	1
values[96]	63	1			T781	1		T537	4		T777	1
values[97]	49	1			T781	1		T537	3		T777	2
values[98]	69	1			T781	1		T537	4		T777	1
values[99]	71	1			T781	1		T537	7		T777	1
values[100]	64	1			T781	1		T537	4		T777	1
values[101]	60	1			T781	1		T537	5		T777	1
values[102]	63	1			T781	1		T537	4		T777	1
values[103]	68	1			T781	1		T537	4		T777	1
values[104]	71	1			T781	2		T537	5		T777	1
values[105]	65	1			T781	3		T537	4		T777	1
values[106]	61	1			T781	3		T537	1		T777	1
values[107]	71	1			T781	2		T537	7		T777	1
values[108]	59	1			T781	2		T537	1		T777	1
values[109]	76	1			T781	1		T537	2		T777	1
values[110]	72	1			T781	2		T777	1		T498	12
values[111]	68	1			T781	2		T777	1		T498	9
values[112]	79	1			T781	4		T777	1		T498	15
values[113]	67	1			T781	1		T777	1		T498	8
values[114]	65	1			T781	1		T777	1		T498	4
values[115]	56	1			T781	1		T777	1		T773	1
values[116]	52	1			T781	2		T777	2		T773	1
values[117]	56	1			T781	2		T777	1		T773	1
values[118]	62	1			T781	2		T777	1		T773	1
values[119]	69	1			T781	2		T777	1		T773	1
values[120]	66	1			T781	2		T777	1		T773	1
values[121]	55	1			T781	1		T777	2		T773	1
values[122]	57	1			T781	2		T777	3		T773	6
values[123]	63	1			T781	1		T777	4		T773	3
values[124]	58	1			T781	1		T777	6		T773	1
values[125]	73	1			T781	1		T777	1		T773	3
values[126]	93	1			T781	3		T777	2		T773	1
values[127]	607	1			T781	15		T777	32		T773	33
values[128]	4815	1			T781	285		T777	395		T773	259