Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.hmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	153236	1			T78	2		T79	92		T80	5
values[2]	4178	1			T435	5		T544	4		T537	2
values[3]	2138	1			T756	1		T539	1		T554	2
values[4]	1681	1			T756	1		T539	1		T554	3
values[5]	1388	1			T756	2		T539	1		T554	1
values[6]	1221	1			T756	1		T539	1		T554	1
values[7]	983	1			T756	1		T539	1		T554	1
values[8]	881	1			T756	1		T539	1		T554	1
values[9]	726	1			T756	1		T539	1		T554	1
values[10]	673	1			T756	1		T539	1		T554	2
values[11]	528	1			T756	1		T539	1		T554	2
values[12]	457	1			T756	1		T539	1		T554	3
values[13]	368	1			T756	1		T539	1		T554	6
values[14]	286	1			T756	1		T539	1		T554	6
values[15]	204	1			T756	1		T539	1		T554	5
values[16]	199	1			T756	1		T539	2		T554	4
values[17]	148	1			T756	1		T539	1		T554	6
values[18]	134	1			T756	1		T539	1		T554	2
values[19]	111	1			T756	1		T539	1		T554	5
values[20]	124	1			T756	1		T539	1		T554	2
values[21]	129	1			T756	1		T539	1		T554	4
values[22]	135	1			T756	1		T539	1		T554	3
values[23]	139	1			T756	1		T539	1		T554	1
values[24]	115	1			T756	1		T539	1		T554	2
values[25]	126	1			T756	1		T539	1		T554	2
values[26]	138	1			T756	1		T539	1		T554	1
values[27]	168	1			T756	1		T539	1		T554	1
values[28]	194	1			T756	1		T539	1		T554	2
values[29]	214	1			T756	2		T539	1		T554	5
values[30]	175	1			T756	1		T539	1		T554	1
values[31]	173	1			T756	1		T539	1		T554	2
values[32]	136	1			T756	1		T539	1		T554	2
values[33]	123	1			T756	1		T539	1		T554	1
values[34]	159	1			T756	1		T539	1		T554	2
values[35]	117	1			T756	1		T539	1		T554	1
values[36]	85	1			T756	1		T539	1		T554	3
values[37]	58	1			T756	1		T539	1		T554	1
values[38]	71	1			T756	1		T539	1		T554	1
values[39]	79	1			T756	1		T539	1		T554	2
values[40]	63	1			T756	1		T539	1		T554	1
values[41]	65	1			T756	1		T539	1		T554	2
values[42]	68	1			T756	1		T539	1		T554	2
values[43]	69	1			T756	1		T539	1		T554	3
values[44]	79	1			T756	1		T539	1		T554	3
values[45]	79	1			T756	1		T539	1		T554	2
values[46]	67	1			T756	1		T539	1		T554	2
values[47]	52	1			T756	1		T539	1		T554	1
values[48]	52	1			T756	1		T539	1		T554	3
values[49]	59	1			T756	1		T539	1		T554	3
values[50]	50	1			T756	1		T539	1		T554	3
values[51]	55	1			T756	1		T539	1		T554	2
values[52]	56	1			T756	1		T539	1		T554	1
values[53]	56	1			T756	1		T539	1		T554	4
values[54]	56	1			T756	1		T539	1		T554	3
values[55]	55	1			T756	1		T539	1		T554	2
values[56]	51	1			T756	1		T539	1		T554	2
values[57]	54	1			T756	1		T539	1		T554	1
values[58]	54	1			T756	1		T539	1		T554	1
values[59]	57	1			T756	1		T539	1		T554	1
values[60]	48	1			T756	1		T539	1		T554	2
values[61]	52	1			T756	1		T539	1		T554	1
values[62]	53	1			T756	1		T539	1		T554	1
values[63]	54	1			T756	1		T539	1		T554	1
values[64]	64	1			T756	1		T539	1		T554	2
values[65]	54	1			T756	1		T539	1		T554	2
values[66]	52	1			T756	1		T539	1		T554	5
values[67]	63	1			T756	1		T539	1		T554	8
values[68]	56	1			T756	1		T539	1		T554	3
values[69]	61	1			T756	1		T539	1		T554	2
values[70]	64	1			T756	1		T539	1		T554	3
values[71]	56	1			T756	1		T539	1		T554	2
values[72]	58	1			T756	1		T539	1		T554	2
values[73]	51	1			T756	1		T539	1		T554	3
values[74]	51	1			T756	1		T539	1		T554	1
values[75]	60	1			T756	1		T539	1		T554	1
values[76]	59	1			T756	1		T539	1		T554	3
values[77]	68	1			T756	1		T539	1		T554	2
values[78]	61	1			T756	1		T539	1		T554	2
values[79]	48	1			T756	1		T539	1		T554	2
values[80]	62	1			T756	2		T539	1		T554	1
values[81]	64	1			T756	5		T539	1		T554	3
values[82]	70	1			T756	7		T539	1		T554	4
values[83]	71	1			T756	7		T539	1		T554	1
values[84]	73	1			T756	1		T539	1		T554	3
values[85]	67	1			T756	2		T539	1		T554	6
values[86]	84	1			T756	2		T539	1		T554	9
values[87]	71	1			T756	1		T539	1		T554	1
values[88]	88	1			T756	3		T539	1		T554	4
values[89]	79	1			T756	3		T539	1		T554	2
values[90]	85	1			T756	6		T539	1		T554	2
values[91]	78	1			T756	3		T539	3		T554	3
values[92]	65	1			T756	5		T539	1		T554	1
values[93]	76	1			T756	4		T539	2		T554	2
values[94]	86	1			T756	5		T539	2		T554	3
values[95]	90	1			T756	1		T539	3		T554	2
values[96]	80	1			T756	2		T539	2		T554	3
values[97]	94	1			T756	4		T539	8		T554	2
values[98]	76	1			T756	2		T539	6		T554	1
values[99]	94	1			T756	5		T539	6		T554	2
values[100]	65	1			T756	2		T539	2		T554	3
values[101]	66	1			T756	1		T539	1		T554	1
values[102]	80	1			T756	1		T539	1		T554	2
values[103]	81	1			T756	1		T539	5		T554	4
values[104]	67	1			T756	3		T539	1		T554	1
values[105]	78	1			T756	2		T539	3		T554	4
values[106]	84	1			T756	4		T539	2		T554	7
values[107]	88	1			T756	5		T539	3		T554	8
values[108]	83	1			T756	6		T539	1		T554	4
values[109]	84	1			T756	2		T539	1		T554	7
values[110]	108	1			T756	1		T539	1		T554	8
values[111]	92	1			T756	4		T539	2		T554	4
values[112]	102	1			T756	6		T539	1		T554	7
values[113]	95	1			T756	1		T539	2		T554	9
values[114]	110	1			T756	1		T539	1		T554	8
values[115]	90	1			T756	2		T539	2		T554	7
values[116]	105	1			T756	1		T539	3		T554	8
values[117]	105	1			T756	5		T539	2		T554	7
values[118]	99	1			T756	5		T539	1		T554	2
values[119]	85	1			T756	1		T539	2		T554	3
values[120]	89	1			T756	2		T539	3		T554	3
values[121]	79	1			T756	1		T539	1		T554	2
values[122]	108	1			T756	1		T539	3		T554	5
values[123]	115	1			T756	2		T539	1		T554	3
values[124]	186	1			T756	2		T539	1		T554	14
values[125]	340	1			T756	2		T539	1		T554	33
values[126]	760	1			T756	6		T539	8		T554	60
values[127]	3132	1			T756	81		T539	104		T554	38
values[128]	5797	1			T756	164		T539	228		T554	3