Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	134336	1			T79	78		T80	7		T82	18
values[2]	10305	1			T450	1		T532	4		T435	3
values[3]	4871	1			T532	7		T435	1		T543	1
values[4]	2757	1			T532	7		T547	45		T554	41
values[5]	1726	1			T532	4		T547	40		T554	19
values[6]	1082	1			T532	8		T547	9		T554	29
values[7]	834	1			T532	8		T547	3		T554	7
values[8]	723	1			T532	4		T547	16		T554	1
values[9]	667	1			T532	7		T547	4		T697	22
values[10]	595	1			T532	8		T547	10		T697	6
values[11]	549	1			T532	10		T547	10		T697	4
values[12]	516	1			T532	10		T547	13		T697	4
values[13]	569	1			T532	13		T697	5		T872	1
values[14]	506	1			T532	15		T697	3		T872	1
values[15]	475	1			T532	3		T697	1		T872	1
values[16]	425	1			T532	1		T697	2		T872	1
values[17]	414	1			T532	2		T697	7		T872	1
values[18]	466	1			T532	2		T697	4		T872	1
values[19]	496	1			T532	1		T697	3		T872	1
values[20]	481	1			T532	2		T697	4		T872	1
values[21]	391	1			T532	5		T697	1		T872	1
values[22]	388	1			T532	19		T697	2		T872	1
values[23]	333	1			T532	15		T697	2		T872	1
values[24]	335	1			T532	7		T697	3		T872	1
values[25]	477	1			T532	6		T697	6		T872	1
values[26]	403	1			T532	4		T697	3		T872	1
values[27]	397	1			T532	7		T697	1		T872	1
values[28]	402	1			T532	11		T697	1		T872	1
values[29]	409	1			T532	5		T697	2		T872	1
values[30]	429	1			T532	6		T697	4		T872	1
values[31]	330	1			T532	5		T697	4		T872	1
values[32]	303	1			T532	3		T697	13		T872	1
values[33]	331	1			T532	3		T697	6		T872	1
values[34]	337	1			T532	5		T697	6		T872	1
values[35]	335	1			T532	4		T697	1		T872	1
values[36]	338	1			T532	3		T872	1		T843	1
values[37]	344	1			T532	12		T872	1		T843	1
values[38]	304	1			T532	10		T872	1		T843	1
values[39]	310	1			T532	17		T872	1		T843	1
values[40]	308	1			T532	10		T872	1		T843	1
values[41]	286	1			T532	6		T872	1		T843	1
values[42]	296	1			T532	11		T872	1		T843	1
values[43]	306	1			T532	5		T872	1		T843	1
values[44]	281	1			T532	3		T872	1		T843	1
values[45]	234	1			T532	2		T872	1		T843	1
values[46]	192	1			T532	4		T872	1		T843	1
values[47]	197	1			T532	2		T872	1		T843	1
values[48]	186	1			T532	2		T872	1		T843	1
values[49]	147	1			T532	2		T872	1		T843	1
values[50]	159	1			T532	4		T872	1		T843	1
values[51]	166	1			T532	2		T872	1		T843	1
values[52]	119	1			T532	8		T872	1		T843	1
values[53]	105	1			T532	4		T872	1		T843	1
values[54]	99	1			T532	2		T872	1		T843	1
values[55]	103	1			T532	2		T872	1		T843	1
values[56]	84	1			T532	3		T872	1		T843	1
values[57]	86	1			T532	2		T872	1		T843	1
values[58]	87	1			T532	3		T872	1		T843	1
values[59]	83	1			T532	1		T872	1		T843	1
values[60]	57	1			T532	2		T872	1		T843	1
values[61]	44	1			T532	1		T872	1		T843	1
values[62]	38	1			T532	5		T872	1		T843	1
values[63]	57	1			T532	9		T872	1		T843	1
values[64]	58	1			T532	14		T872	1		T843	1
values[65]	75	1			T532	11		T872	1		T843	1
values[66]	67	1			T532	3		T872	1		T843	1
values[67]	54	1			T532	5		T872	1		T843	1
values[68]	56	1			T532	7		T872	1		T843	1
values[69]	49	1			T532	3		T872	1		T843	1
values[70]	35	1			T872	1		T843	1		T851	2
values[71]	53	1			T872	1		T843	1		T851	4
values[72]	50	1			T872	1		T843	1		T851	5
values[73]	52	1			T872	1		T843	1		T851	3
values[74]	60	1			T872	1		T843	1		T851	12
values[75]	57	1			T872	1		T843	1		T851	8
values[76]	58	1			T872	1		T843	1		T851	7
values[77]	53	1			T872	1		T843	1		T851	10
values[78]	49	1			T872	1		T843	1		T851	6
values[79]	54	1			T872	1		T843	1		T851	2
values[80]	48	1			T872	1		T843	1		T851	8
values[81]	52	1			T872	1		T843	1		T851	10
values[82]	54	1			T872	1		T843	1		T851	4
values[83]	48	1			T872	1		T843	1		T851	4
values[84]	51	1			T872	1		T843	1		T851	4
values[85]	44	1			T872	1		T843	1		T851	7
values[86]	42	1			T872	1		T843	1		T851	4
values[87]	52	1			T872	1		T843	1		T851	7
values[88]	50	1			T872	1		T843	1		T851	7
values[89]	50	1			T872	1		T843	1		T851	9
values[90]	47	1			T872	1		T843	1		T851	10
values[91]	43	1			T872	1		T843	2		T851	13
values[92]	45	1			T872	1		T843	1		T851	4
values[93]	37	1			T872	1		T843	1		T851	3
values[94]	43	1			T872	1		T843	1		T851	9
values[95]	40	1			T872	1		T843	1		T851	5
values[96]	26	1			T872	1		T843	1		T851	2
values[97]	33	1			T872	1		T843	1		T851	5
values[98]	34	1			T872	2		T843	1		T851	3
values[99]	43	1			T872	1		T843	1		T851	4
values[100]	36	1			T872	4		T843	1		T851	2
values[101]	50	1			T872	2		T843	2		T851	5
values[102]	38	1			T872	2		T843	2		T866	6
values[103]	38	1			T872	2		T843	2		T866	4
values[104]	36	1			T872	1		T843	1		T866	7
values[105]	37	1			T872	1		T843	2		T866	5
values[106]	43	1			T872	3		T843	5		T866	8
values[107]	42	1			T872	3		T843	2		T866	5
values[108]	32	1			T872	3		T843	1		T866	6
values[109]	40	1			T872	4		T843	2		T866	3
values[110]	33	1			T872	1		T843	2		T866	3
values[111]	43	1			T872	3		T843	1		T866	4
values[112]	51	1			T872	6		T843	1		T866	4
values[113]	43	1			T872	2		T843	1		T866	6
values[114]	33	1			T872	4		T843	1		T866	6
values[115]	34	1			T872	1		T843	1		T866	5
values[116]	53	1			T872	3		T843	1		T866	9
values[117]	36	1			T872	1		T843	3		T866	4
values[118]	43	1			T872	1		T843	1		T866	9
values[119]	53	1			T872	2		T843	1		T866	12
values[120]	35	1			T872	5		T843	2		T866	4
values[121]	45	1			T872	3		T843	3		T866	8
values[122]	50	1			T872	7		T843	3		T866	7
values[123]	33	1			T872	1		T843	1		T866	6
values[124]	29	1			T872	2		T843	2		T866	4
values[125]	35	1			T872	2		T843	1		T866	4
values[126]	98	1			T872	3		T843	6		T866	11
values[127]	1169	1			T872	52		T843	62		T866	180
values[128]	5596	1			T872	305		T843	244		T866	903