SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.23 | 85.23 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl | 85.42 | 85.42 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.42 | 85.42 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
85.42 | 85.42 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.21 | 90.32 | 89.30 | 100.00 | top_earlgrey |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9385 | 85.23 |
Total Bits 0->1 | 5506 | 4709 | 85.52 |
Total Bits 1->0 | 5506 | 4676 | 84.93 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9385 | 85.23 |
Port Bits 0->1 | 5506 | 4709 | 85.52 |
Port Bits 1->0 | 5506 | 4676 | 84.93 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_ni | Yes | Yes | T45,T46,T47 | Yes | T4,T5,T6 | INPUT |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
rst_edn_ni | Yes | Yes | T45,T46,T47 | Yes | T4,T5,T6 | INPUT |
edn_o.edn_req | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
edn_i.edn_fips | No | No | Yes | T105,T124,T179 | INPUT | |
edn_i.edn_ack | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
core_tl_i.d_ready | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T87,*T88,*T89 | Yes | T87,T88,T89 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T5,*T6,*T17 | Yes | T5,T6,T17 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T5,*T6,*T17 | Yes | T5,T6,T17 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T87,T88,T89 | Yes | T87,T88,T89 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T80,T90,T65 | Yes | T80,T90,T65 | INPUT |
core_tl_i.a_valid | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
core_tl_o.a_ready | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T88,T89,T91 | Yes | T88,T89,T91 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T88,T89,T91 | Yes | T88,T89,T91 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T76,*T79,*T65 | Yes | T76,T79,T65 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T87,T88,T89 | Yes | T87,T88,T89 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T45,*T46,*T108 | Yes | T45,T46,T108 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T87,*T88,*T89 | Yes | T87,T88,T89 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T65,*T92,*T87 | Yes | T65,T92,T87 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T5,*T6,*T17 | Yes | T5,T6,T17 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T5,*T6,*T17 | Yes | T5,T6,T17 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T87,T88,T89 | Yes | T87,T88,T89 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T80,T90,T65 | Yes | T80,T90,T65 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T5,T6,T17 | Yes | T45,T46,T47 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T5,T6,T17 | Yes | T45,T46,T47 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T88,T89,T91 | Yes | T88,T89,T91 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T65,*T92,T88 | Yes | T65,T92,T88 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T87,T88,T89 | Yes | T87,T88,T89 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T5,*T6,*T17 | Yes | T45,T46,T47 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T180,T181,T182 | Yes | T180,T181,T182 | OUTPUT |
intr_otp_error_o | Yes | Yes | T180,T181,T182 | Yes | T180,T181,T182 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T183,T66,T93 | Yes | T183,T66,T93 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T47,T73,T74 | Yes | T47,T73,T74 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T66,T93,T184 | Yes | T66,T93,T184 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T93,T94,T95 | Yes | T93,T95,T96 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T93,T95,T96 | Yes | T93,T94,T95 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T66,T93,T185 | Yes | T66,T93,T185 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T66,T186,T93 | Yes | T66,T186,T93 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T186,T93,T94 | Yes | T186,T93,T95 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T186,T93,T95 | Yes | T186,T93,T94 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T183,T66,T93 | Yes | T183,T66,T93 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T47,T73,T74 | Yes | T47,T73,T74 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T66,T93,T184 | Yes | T66,T93,T184 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T66,T93,T185 | Yes | T66,T93,T185 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T66,T186,T93 | Yes | T66,T186,T93 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T103,T132,T31 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T4,T45,T46 | Yes | T4,T5,T6 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T45,T46,T47 | Yes | T4,T5,T6 | OUTPUT |
lc_otp_vendor_test_i.ctrl[14:0] | No | No | Yes | T187,T188,T189 | INPUT | |
lc_otp_vendor_test_i.ctrl[15] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:16] | No | No | Yes | T187,T188,T189 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[5:0] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[6] | No | No | No | INPUT | ||
lc_otp_program_i.count[8:7] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[9] | No | No | No | INPUT | ||
lc_otp_program_i.count[15:10] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[16] | No | No | No | INPUT | ||
lc_otp_program_i.count[17] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[18] | No | No | No | INPUT | ||
lc_otp_program_i.count[24:19] | Yes | Yes | *T4,*T64,T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[25] | No | No | No | INPUT | ||
lc_otp_program_i.count[34:26] | Yes | Yes | T4,T64,*T21 | Yes | T21,T63,T190 | INPUT |
lc_otp_program_i.count[35] | No | No | No | INPUT | ||
lc_otp_program_i.count[40:36] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T183,T63 | INPUT |
lc_otp_program_i.count[41] | No | No | No | INPUT | ||
lc_otp_program_i.count[42] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[43] | No | No | No | INPUT | ||
lc_otp_program_i.count[52:44] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T183,T63 | INPUT |
lc_otp_program_i.count[53] | No | No | No | INPUT | ||
lc_otp_program_i.count[60:54] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT |
lc_otp_program_i.count[61] | No | No | No | INPUT | ||
lc_otp_program_i.count[71:62] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T183,T63 | INPUT |
lc_otp_program_i.count[72] | No | No | No | INPUT | ||
lc_otp_program_i.count[82:73] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T63,T190 | INPUT |
lc_otp_program_i.count[83] | No | No | No | INPUT | ||
lc_otp_program_i.count[85:84] | Yes | Yes | T4,T64,T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[86] | No | No | No | INPUT | ||
lc_otp_program_i.count[91:87] | Yes | Yes | T4,*T59,*T108 | Yes | T108,T110,T21 | INPUT |
lc_otp_program_i.count[92] | No | No | No | INPUT | ||
lc_otp_program_i.count[93] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[94] | No | No | No | INPUT | ||
lc_otp_program_i.count[97:95] | Yes | Yes | T4,*T59,*T108 | Yes | T108,T110,T21 | INPUT |
lc_otp_program_i.count[99:98] | No | No | No | INPUT | ||
lc_otp_program_i.count[103:100] | Yes | Yes | T4,T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[104] | No | No | No | INPUT | ||
lc_otp_program_i.count[106:105] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[107] | No | No | No | INPUT | ||
lc_otp_program_i.count[123:108] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[124] | No | No | No | INPUT | ||
lc_otp_program_i.count[126:125] | Yes | Yes | *T4,*T59,*T108 | Yes | T108,T110,T21 | INPUT |
lc_otp_program_i.count[127] | No | No | No | INPUT | ||
lc_otp_program_i.count[133:128] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[134] | No | No | No | INPUT | ||
lc_otp_program_i.count[141:135] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[144:142] | No | No | No | INPUT | ||
lc_otp_program_i.count[149:145] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[150] | No | No | No | INPUT | ||
lc_otp_program_i.count[158:151] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[159] | No | No | No | INPUT | ||
lc_otp_program_i.count[161:160] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[162] | No | No | No | INPUT | ||
lc_otp_program_i.count[164:163] | Yes | Yes | T4,T64,T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[165] | No | No | No | INPUT | ||
lc_otp_program_i.count[181:166] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[182] | No | No | No | INPUT | ||
lc_otp_program_i.count[186:183] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[187] | No | No | No | INPUT | ||
lc_otp_program_i.count[193:188] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[194] | No | No | No | INPUT | ||
lc_otp_program_i.count[195] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[196] | No | No | No | INPUT | ||
lc_otp_program_i.count[204:197] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[205] | No | No | No | INPUT | ||
lc_otp_program_i.count[215:206] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[216] | No | No | No | INPUT | ||
lc_otp_program_i.count[228:217] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT |
lc_otp_program_i.count[229] | No | No | No | INPUT | ||
lc_otp_program_i.count[238:230] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[239] | No | No | No | INPUT | ||
lc_otp_program_i.count[245:240] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[246] | No | No | No | INPUT | ||
lc_otp_program_i.count[273:247] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[274] | No | No | No | INPUT | ||
lc_otp_program_i.count[276:275] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[277] | No | No | No | INPUT | ||
lc_otp_program_i.count[293:278] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[294] | No | No | No | INPUT | ||
lc_otp_program_i.count[302:295] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[303] | No | No | No | INPUT | ||
lc_otp_program_i.count[312:304] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[313] | No | No | No | INPUT | ||
lc_otp_program_i.count[315:314] | Yes | Yes | T4,T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[317:316] | No | No | No | INPUT | ||
lc_otp_program_i.count[319:318] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[320] | No | No | No | INPUT | ||
lc_otp_program_i.count[328:321] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[329] | No | No | No | INPUT | ||
lc_otp_program_i.count[332:330] | Yes | Yes | *T4,*T64,T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[333] | No | No | No | INPUT | ||
lc_otp_program_i.count[337:334] | Yes | Yes | T4,T5,T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[338] | No | No | No | INPUT | ||
lc_otp_program_i.count[345:339] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[346] | No | No | No | INPUT | ||
lc_otp_program_i.count[347] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[348] | No | No | No | INPUT | ||
lc_otp_program_i.count[349] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.count[350] | No | No | No | INPUT | ||
lc_otp_program_i.count[376:351] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT |
lc_otp_program_i.count[377] | No | No | No | INPUT | ||
lc_otp_program_i.count[378] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.count[379] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:380] | Yes | Yes | T4,T64,T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[9:0] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[10] | No | No | No | INPUT | ||
lc_otp_program_i.state[28:11] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[29] | No | No | No | INPUT | ||
lc_otp_program_i.state[31:30] | Yes | Yes | T183,T191,*T192 | Yes | T183,T191,T192 | INPUT |
lc_otp_program_i.state[32] | No | No | No | INPUT | ||
lc_otp_program_i.state[40:33] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.state[41] | No | No | No | INPUT | ||
lc_otp_program_i.state[49:42] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT |
lc_otp_program_i.state[50] | No | No | No | INPUT | ||
lc_otp_program_i.state[52:51] | Yes | Yes | T4,T64,*T21 | Yes | T21,T22,T183 | INPUT |
lc_otp_program_i.state[53] | No | No | No | INPUT | ||
lc_otp_program_i.state[57:54] | Yes | Yes | T4,T64,*T21 | Yes | T21,T22,T63 | INPUT |
lc_otp_program_i.state[58] | No | No | No | INPUT | ||
lc_otp_program_i.state[60:59] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.state[62:61] | No | No | No | INPUT | ||
lc_otp_program_i.state[74:63] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T63 | INPUT |
lc_otp_program_i.state[75] | No | No | No | INPUT | ||
lc_otp_program_i.state[102:76] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T183 | INPUT |
lc_otp_program_i.state[103] | No | No | No | INPUT | ||
lc_otp_program_i.state[126:104] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.state[127] | No | No | No | INPUT | ||
lc_otp_program_i.state[128] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[129] | No | No | No | INPUT | ||
lc_otp_program_i.state[131:130] | Yes | Yes | T4,T64,T21 | Yes | T21,T22,T63 | INPUT |
lc_otp_program_i.state[132] | No | No | No | INPUT | ||
lc_otp_program_i.state[138:133] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[139] | No | No | No | INPUT | ||
lc_otp_program_i.state[145:140] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T63 | INPUT |
lc_otp_program_i.state[146] | No | No | No | INPUT | ||
lc_otp_program_i.state[147] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT |
lc_otp_program_i.state[148] | No | No | No | INPUT | ||
lc_otp_program_i.state[150:149] | Yes | Yes | T4,T64,T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[151] | No | No | No | INPUT | ||
lc_otp_program_i.state[160:152] | Yes | Yes | T4,T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[161] | No | No | No | INPUT | ||
lc_otp_program_i.state[169:162] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT |
lc_otp_program_i.state[170] | No | No | No | INPUT | ||
lc_otp_program_i.state[175:171] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[176] | No | No | No | INPUT | ||
lc_otp_program_i.state[191:177] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT |
lc_otp_program_i.state[192] | No | No | No | INPUT | ||
lc_otp_program_i.state[224:193] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT |
lc_otp_program_i.state[225] | No | No | No | INPUT | ||
lc_otp_program_i.state[230:226] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.state[232:231] | No | No | No | INPUT | ||
lc_otp_program_i.state[234:233] | Yes | Yes | T4,T64,T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[235] | No | No | No | INPUT | ||
lc_otp_program_i.state[246:236] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[247] | No | No | No | INPUT | ||
lc_otp_program_i.state[252:248] | Yes | Yes | T4,*T59,*T110 | Yes | T110,T20,T21 | INPUT |
lc_otp_program_i.state[253] | No | No | No | INPUT | ||
lc_otp_program_i.state[262:254] | Yes | Yes | *T4,*T59,*T110 | Yes | T110,T20,T21 | INPUT |
lc_otp_program_i.state[263] | No | No | No | INPUT | ||
lc_otp_program_i.state[268:264] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT |
lc_otp_program_i.state[269] | No | No | No | INPUT | ||
lc_otp_program_i.state[290:270] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[291] | No | No | No | INPUT | ||
lc_otp_program_i.state[293:292] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.state[294] | No | No | No | INPUT | ||
lc_otp_program_i.state[316:295] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT |
lc_otp_program_i.state[318:317] | No | No | No | INPUT | ||
lc_otp_program_i.state[319] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT |
lc_otp_program_i.req | Yes | Yes | T4,T64,T22 | Yes | T4,T64,T22 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T4,T64,T22 | Yes | T4,T64,T22 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T193,T194,T195 | Yes | T193,T194,T195 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T47,T73,T74 | Yes | T47,T73,T74 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T22,T63,T72 | Yes | T4,T64,T22 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T4,T5,T6 | Yes | T46,T47,T73 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T20,T63,T58 | Yes | T45,T46,T108 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T103,T108,T74 | Yes | T26,T97,T59 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T45,T46,T47 | Yes | T17,T18,T19 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T20,T63,T58 | Yes | T45,T46,T108 | OUTPUT |
otp_lc_data_o.count[5:0] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[6] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[8:7] | Yes | Yes | T4,T64,T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[9] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[15:10] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[16] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[17] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[18] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[24:19] | Yes | Yes | T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[25] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[34:26] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T63,T190 | OUTPUT |
otp_lc_data_o.count[35] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[40:36] | Yes | Yes | T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[41] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[42] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[43] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[52:44] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[53] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[60:54] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.count[61] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[71:62] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[72] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[82:73] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T63,T190 | OUTPUT |
otp_lc_data_o.count[83] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[85:84] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[86] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[91:87] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[93] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[94] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[97:95] | Yes | Yes | *T4,*T59,T108 | Yes | T108,T110,T21 | OUTPUT |
otp_lc_data_o.count[99:98] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[103:100] | Yes | Yes | T4,T64,*T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[104] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[106:105] | Yes | Yes | T4,T64,T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[107] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[123:108] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[124] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[126:125] | Yes | Yes | T4,T59,*T108 | Yes | T108,T110,T21 | OUTPUT |
otp_lc_data_o.count[127] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[133:128] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[134] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[141:135] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[144:142] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[149:145] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T72,T155 | OUTPUT |
otp_lc_data_o.count[150] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[158:151] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.count[159] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[161:160] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT |
otp_lc_data_o.count[162] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[164:163] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[165] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[181:166] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[182] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[186:183] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT |
otp_lc_data_o.count[187] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[193:188] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[194] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[195] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[196] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[204:197] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[205] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[215:206] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[216] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[228:217] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.count[229] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[238:230] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[239] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[245:240] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[246] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[273:247] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.count[274] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[276:275] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[293:278] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT |
otp_lc_data_o.count[294] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[302:295] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT |
otp_lc_data_o.count[303] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[312:304] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[313] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[315:314] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[317:316] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[319:318] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.count[320] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[328:321] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT |
otp_lc_data_o.count[329] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[332:330] | Yes | Yes | T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[333] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[337:334] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT |
otp_lc_data_o.count[338] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[345:339] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[346] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[347] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT |
otp_lc_data_o.count[348] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[349] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT |
otp_lc_data_o.count[350] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[376:351] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.count[377] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[378] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:380] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[9:0] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[10] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[28:11] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[29] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[31:30] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.state[32] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[40:33] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T157,T158 | OUTPUT |
otp_lc_data_o.state[41] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[49:42] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.state[50] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[52:51] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[53] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[57:54] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T63 | OUTPUT |
otp_lc_data_o.state[58] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[60:59] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T157,T158 | OUTPUT |
otp_lc_data_o.state[62:61] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[74:63] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T63 | OUTPUT |
otp_lc_data_o.state[75] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[102:76] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[103] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[126:104] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T157,T158 | OUTPUT |
otp_lc_data_o.state[127] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[128] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[129] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[131:130] | Yes | Yes | T4,T64,T21 | Yes | T21,T22,T63 | OUTPUT |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[138:133] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[139] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[145:140] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T63 | OUTPUT |
otp_lc_data_o.state[146] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[147] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.state[148] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[150:149] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[151] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[160:152] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[161] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[169:162] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.state[170] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[175:171] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[176] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[191:177] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.state[192] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[224:193] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.state[225] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[230:226] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T157,T158 | OUTPUT |
otp_lc_data_o.state[232:231] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[234:233] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[235] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[246:236] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[247] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[252:248] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[262:254] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[263] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[268:264] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_lc_data_o.state[269] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[290:270] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[291] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[293:292] | Yes | Yes | T4,*T64,*T63 | Yes | T63,T157,T158 | OUTPUT |
otp_lc_data_o.state[294] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[316:295] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT |
otp_lc_data_o.state[318:317] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319] | Yes | Yes | T4,T64,T63 | Yes | T63,T157,T158 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T47,T73,T74 | Yes | T47,T73,T74 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T45,T46,T47 | Yes | T4,T5,T6 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T20,T63,T58 | Yes | T45,T46,T108 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T6,T17,T26 | Yes | T46,T47,T103 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T20,T63,T58 | Yes | T45,T46,T108 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T6,T26,T18 | Yes | T46,T47,T74 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T59,T60,T61 | Yes | T59,T60,T61 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T127,T197,T198 | Yes | T127,T197,T198 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T199,T200,T201 | Yes | T199,T200,T201 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T59,T60,T61 | Yes | T59,T60,T61 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T127,T197,T198 | Yes | T127,T197,T198 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T199,T200,T202 | Yes | T199,T200,T202 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T59,T105,T60 | Yes | T59,T105,T60 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T59,T105,T60 | Yes | T59,T105,T60 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T47,T103,T110 | Yes | T5,T6,T26 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[48:0] | Yes | Yes | *T156,*T203,*T204 | Yes | T156,T203,T204 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[49] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[68:50] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[69] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[75:70] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[76] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[91:77] | Yes | Yes | *T203,*T204,*T134 | Yes | T203,T204,T134 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[92] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[96:93] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[97] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[127:98] | Yes | Yes | *T156,*T203,*T204 | Yes | T156,T203,T204 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[128] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[160:129] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[161] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[198:162] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[199] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[240:200] | Yes | Yes | *T203,*T205,*T156 | Yes | T203,T205,T156 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[241] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:242] | Yes | Yes | T156,T203,T204 | Yes | T156,T203,T204 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T45,T47,T108 | Yes | T5,T6,T26 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T45,T46,T47 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T45,T46,T47 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T45,T46,T47 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T45,T46,T47 | Yes | T4,T5,T6 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T23,T24,T25 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9384 | 85.42 |
Total Bits 0->1 | 5493 | 4708 | 85.71 |
Total Bits 1->0 | 5493 | 4676 | 85.13 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9384 | 85.42 |
Port Bits 0->1 | 5493 | 4708 | 85.71 |
Port Bits 1->0 | 5493 | 4676 | 85.13 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_ni | Yes | Yes | T45,T46,T47 | Yes | T4,T5,T6 | INPUT | |
clk_edn_i | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
rst_edn_ni | Yes | Yes | T45,T46,T47 | Yes | T4,T5,T6 | INPUT | |
edn_o.edn_req | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
edn_i.edn_fips | No | No | Yes | T105,T124,T179 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T87,*T88,*T89 | Yes | T87,T88,T89 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T5,*T6,*T17 | Yes | T5,T6,T17 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T5,*T6,*T17 | Yes | T5,T6,T17 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T87,T88,T89 | Yes | T87,T88,T89 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T80,T90,T65 | Yes | T80,T90,T65 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T88,T89,T91 | Yes | T88,T89,T91 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T88,T89,T91 | Yes | T88,T89,T91 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T76,*T79,*T65 | Yes | T76,T79,T65 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T87,T88,T89 | Yes | T87,T88,T89 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T45,*T46,*T108 | Yes | T45,T46,T108 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T87,*T88,*T89 | Yes | T87,T88,T89 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T65,*T92,*T87 | Yes | T65,T92,T87 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T5,*T6,*T17 | Yes | T5,T6,T17 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T5,*T6,*T17 | Yes | T5,T6,T17 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T76,*T77,*T78 | Yes | T76,T77,T78 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T87,T88,T89 | Yes | T87,T88,T89 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T80,T90,T65 | Yes | T80,T90,T65 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T5,T6,T17 | Yes | T45,T46,T47 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T5,T6,T17 | Yes | T45,T46,T47 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T88,T89,T91 | Yes | T88,T89,T91 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T65,*T92,T88 | Yes | T65,T92,T88 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T87,T88,T89 | Yes | T87,T88,T89 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T5,*T6,*T17 | Yes | T45,T46,T47 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T65,T92,T87 | Yes | T65,T92,T87 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T180,T181,T182 | Yes | T180,T181,T182 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T180,T181,T182 | Yes | T180,T181,T182 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T183,T66,T93 | Yes | T183,T66,T93 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T47,T73,T74 | Yes | T47,T73,T74 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T66,T93,T184 | Yes | T66,T93,T184 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T93,T94,T95 | Yes | T93,T95,T96 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T93,T95,T96 | Yes | T93,T94,T95 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T66,T93,T185 | Yes | T66,T93,T185 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T93,T94,T95 | Yes | T93,T94,T95 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T66,T186,T93 | Yes | T66,T186,T93 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T186,T93,T94 | Yes | T186,T93,T95 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T186,T93,T95 | Yes | T186,T93,T94 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T183,T66,T93 | Yes | T183,T66,T93 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T47,T73,T74 | Yes | T47,T73,T74 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T66,T93,T184 | Yes | T66,T93,T184 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T66,T93,T185 | Yes | T66,T93,T185 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T66,T186,T93 | Yes | T66,T186,T93 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T4,T5,T6 | Yes | T103,T132,T31 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T4,T5,T6 | Yes | T4,T5,T6 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T4,T45,T46 | Yes | T4,T5,T6 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T45,T46,T47 | Yes | T4,T5,T6 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[14:0] | No | No | Yes | T187,T188,T189 | INPUT | ||
lc_otp_vendor_test_i.ctrl[15] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:16] | No | No | Yes | T187,T188,T189 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[5:0] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[6] | No | No | No | INPUT | |||
lc_otp_program_i.count[8:7] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[9] | No | No | No | INPUT | |||
lc_otp_program_i.count[15:10] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[16] | No | No | No | INPUT | |||
lc_otp_program_i.count[17] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[18] | No | No | No | INPUT | |||
lc_otp_program_i.count[24:19] | Yes | Yes | *T4,*T64,T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[25] | No | No | No | INPUT | |||
lc_otp_program_i.count[34:26] | Yes | Yes | T4,T64,*T21 | Yes | T21,T63,T190 | INPUT | |
lc_otp_program_i.count[35] | No | No | No | INPUT | |||
lc_otp_program_i.count[40:36] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T183,T63 | INPUT | |
lc_otp_program_i.count[41] | No | No | No | INPUT | |||
lc_otp_program_i.count[42] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[43] | No | No | No | INPUT | |||
lc_otp_program_i.count[52:44] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T183,T63 | INPUT | |
lc_otp_program_i.count[53] | No | No | No | INPUT | |||
lc_otp_program_i.count[60:54] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT | |
lc_otp_program_i.count[61] | No | No | No | INPUT | |||
lc_otp_program_i.count[71:62] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T183,T63 | INPUT | |
lc_otp_program_i.count[72] | No | No | No | INPUT | |||
lc_otp_program_i.count[82:73] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T63,T190 | INPUT | |
lc_otp_program_i.count[83] | No | No | No | INPUT | |||
lc_otp_program_i.count[85:84] | Yes | Yes | T4,T64,T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[86] | No | No | No | INPUT | |||
lc_otp_program_i.count[91:87] | Yes | Yes | T4,*T59,*T108 | Yes | T108,T110,T21 | INPUT | |
lc_otp_program_i.count[92] | No | No | No | INPUT | |||
lc_otp_program_i.count[93] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[94] | No | No | No | INPUT | |||
lc_otp_program_i.count[97:95] | Yes | Yes | T4,*T59,*T108 | Yes | T108,T110,T21 | INPUT | |
lc_otp_program_i.count[99:98] | No | No | No | INPUT | |||
lc_otp_program_i.count[103:100] | Yes | Yes | T4,T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[104] | No | No | No | INPUT | |||
lc_otp_program_i.count[106:105] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[107] | No | No | No | INPUT | |||
lc_otp_program_i.count[123:108] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[124] | No | No | No | INPUT | |||
lc_otp_program_i.count[126:125] | Yes | Yes | *T4,*T59,*T108 | Yes | T108,T110,T21 | INPUT | |
lc_otp_program_i.count[127] | No | No | No | INPUT | |||
lc_otp_program_i.count[133:128] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[134] | No | No | No | INPUT | |||
lc_otp_program_i.count[141:135] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[144:142] | No | No | No | INPUT | |||
lc_otp_program_i.count[149:145] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[150] | No | No | No | INPUT | |||
lc_otp_program_i.count[158:151] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[159] | No | No | No | INPUT | |||
lc_otp_program_i.count[161:160] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[162] | No | No | No | INPUT | |||
lc_otp_program_i.count[164:163] | Yes | Yes | T4,T64,T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[165] | No | No | No | INPUT | |||
lc_otp_program_i.count[181:166] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[182] | No | No | No | INPUT | |||
lc_otp_program_i.count[186:183] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[187] | No | No | No | INPUT | |||
lc_otp_program_i.count[193:188] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[194] | No | No | No | INPUT | |||
lc_otp_program_i.count[195] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[196] | No | No | No | INPUT | |||
lc_otp_program_i.count[204:197] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[205] | No | No | No | INPUT | |||
lc_otp_program_i.count[215:206] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[216] | No | No | No | INPUT | |||
lc_otp_program_i.count[228:217] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT | |
lc_otp_program_i.count[229] | No | No | No | INPUT | |||
lc_otp_program_i.count[238:230] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[239] | No | No | No | INPUT | |||
lc_otp_program_i.count[245:240] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[246] | No | No | No | INPUT | |||
lc_otp_program_i.count[273:247] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[274] | No | No | No | INPUT | |||
lc_otp_program_i.count[276:275] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[277] | No | No | No | INPUT | |||
lc_otp_program_i.count[293:278] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[294] | No | No | No | INPUT | |||
lc_otp_program_i.count[302:295] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[303] | No | No | No | INPUT | |||
lc_otp_program_i.count[312:304] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[313] | No | No | No | INPUT | |||
lc_otp_program_i.count[315:314] | Yes | Yes | T4,T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[317:316] | No | No | No | INPUT | |||
lc_otp_program_i.count[319:318] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[320] | No | No | No | INPUT | |||
lc_otp_program_i.count[328:321] | Yes | Yes | T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[329] | No | No | No | INPUT | |||
lc_otp_program_i.count[332:330] | Yes | Yes | *T4,*T64,T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[333] | No | No | No | INPUT | |||
lc_otp_program_i.count[337:334] | Yes | Yes | T4,T5,T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[338] | No | No | No | INPUT | |||
lc_otp_program_i.count[345:339] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[346] | No | No | No | INPUT | |||
lc_otp_program_i.count[347] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[348] | No | No | No | INPUT | |||
lc_otp_program_i.count[349] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.count[350] | No | No | No | INPUT | |||
lc_otp_program_i.count[376:351] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | INPUT | |
lc_otp_program_i.count[377] | No | No | No | INPUT | |||
lc_otp_program_i.count[378] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.count[379] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:380] | Yes | Yes | T4,T64,T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[9:0] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[10] | No | No | No | INPUT | |||
lc_otp_program_i.state[28:11] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[29] | No | No | No | INPUT | |||
lc_otp_program_i.state[31:30] | Yes | Yes | T183,T191,*T192 | Yes | T183,T191,T192 | INPUT | |
lc_otp_program_i.state[32] | No | No | No | INPUT | |||
lc_otp_program_i.state[40:33] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.state[41] | No | No | No | INPUT | |||
lc_otp_program_i.state[49:42] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT | |
lc_otp_program_i.state[50] | No | No | No | INPUT | |||
lc_otp_program_i.state[52:51] | Yes | Yes | T4,T64,*T21 | Yes | T21,T22,T183 | INPUT | |
lc_otp_program_i.state[53] | No | No | No | INPUT | |||
lc_otp_program_i.state[57:54] | Yes | Yes | T4,T64,*T21 | Yes | T21,T22,T63 | INPUT | |
lc_otp_program_i.state[58] | No | No | No | INPUT | |||
lc_otp_program_i.state[60:59] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.state[62:61] | No | No | No | INPUT | |||
lc_otp_program_i.state[74:63] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T63 | INPUT | |
lc_otp_program_i.state[75] | No | No | No | INPUT | |||
lc_otp_program_i.state[102:76] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T183 | INPUT | |
lc_otp_program_i.state[103] | No | No | No | INPUT | |||
lc_otp_program_i.state[126:104] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.state[127] | No | No | No | INPUT | |||
lc_otp_program_i.state[128] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[129] | No | No | No | INPUT | |||
lc_otp_program_i.state[131:130] | Yes | Yes | T4,T64,T21 | Yes | T21,T22,T63 | INPUT | |
lc_otp_program_i.state[132] | No | No | No | INPUT | |||
lc_otp_program_i.state[138:133] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[139] | No | No | No | INPUT | |||
lc_otp_program_i.state[145:140] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T63 | INPUT | |
lc_otp_program_i.state[146] | No | No | No | INPUT | |||
lc_otp_program_i.state[147] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT | |
lc_otp_program_i.state[148] | No | No | No | INPUT | |||
lc_otp_program_i.state[150:149] | Yes | Yes | T4,T64,T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[151] | No | No | No | INPUT | |||
lc_otp_program_i.state[160:152] | Yes | Yes | T4,T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[161] | No | No | No | INPUT | |||
lc_otp_program_i.state[169:162] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT | |
lc_otp_program_i.state[170] | No | No | No | INPUT | |||
lc_otp_program_i.state[175:171] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[176] | No | No | No | INPUT | |||
lc_otp_program_i.state[191:177] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT | |
lc_otp_program_i.state[192] | No | No | No | INPUT | |||
lc_otp_program_i.state[224:193] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT | |
lc_otp_program_i.state[225] | No | No | No | INPUT | |||
lc_otp_program_i.state[230:226] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.state[232:231] | No | No | No | INPUT | |||
lc_otp_program_i.state[234:233] | Yes | Yes | T4,T64,T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[235] | No | No | No | INPUT | |||
lc_otp_program_i.state[246:236] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[247] | No | No | No | INPUT | |||
lc_otp_program_i.state[252:248] | Yes | Yes | T4,*T59,*T110 | Yes | T110,T20,T21 | INPUT | |
lc_otp_program_i.state[253] | No | No | No | INPUT | |||
lc_otp_program_i.state[262:254] | Yes | Yes | *T4,*T59,*T110 | Yes | T110,T20,T21 | INPUT | |
lc_otp_program_i.state[263] | No | No | No | INPUT | |||
lc_otp_program_i.state[268:264] | Yes | Yes | *T183,*T191,*T192 | Yes | T183,T191,T192 | INPUT | |
lc_otp_program_i.state[269] | No | No | No | INPUT | |||
lc_otp_program_i.state[290:270] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[291] | No | No | No | INPUT | |||
lc_otp_program_i.state[293:292] | Yes | Yes | *T4,*T64,*T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.state[294] | No | No | No | INPUT | |||
lc_otp_program_i.state[316:295] | Yes | Yes | *T4,*T64,*T183 | Yes | T4,T64,T183 | INPUT | |
lc_otp_program_i.state[318:317] | No | No | No | INPUT | |||
lc_otp_program_i.state[319] | Yes | Yes | T4,T64,T63 | Yes | T4,T64,T63 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T4,T64,T22 | Yes | T4,T64,T22 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T4,T64,T22 | Yes | T4,T64,T22 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T193,T194,T195 | Yes | T193,T194,T195 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T47,T73,T74 | Yes | T47,T73,T74 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T22,T63,T72 | Yes | T4,T64,T22 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T4,T5,T6 | Yes | T46,T47,T73 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T20,T63,T58 | Yes | T45,T46,T108 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T103,T108,T74 | Yes | T26,T97,T59 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T45,T46,T47 | Yes | T17,T18,T19 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T20,T63,T58 | Yes | T45,T46,T108 | OUTPUT | |
otp_lc_data_o.count[5:0] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[6] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[8:7] | Yes | Yes | T4,T64,T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[9] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[15:10] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[16] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[17] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[18] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[24:19] | Yes | Yes | T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[25] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[34:26] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T63,T190 | OUTPUT | |
otp_lc_data_o.count[35] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[40:36] | Yes | Yes | T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[41] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[42] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[43] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[52:44] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[53] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[60:54] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.count[61] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[71:62] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[72] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[82:73] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T63,T190 | OUTPUT | |
otp_lc_data_o.count[83] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[85:84] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[86] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[91:87] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[92] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[93] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[94] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[97:95] | Yes | Yes | *T4,*T59,T108 | Yes | T108,T110,T21 | OUTPUT | |
otp_lc_data_o.count[99:98] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[103:100] | Yes | Yes | T4,T64,*T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[104] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[106:105] | Yes | Yes | T4,T64,T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[107] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[123:108] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[124] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[126:125] | Yes | Yes | T4,T59,*T108 | Yes | T108,T110,T21 | OUTPUT | |
otp_lc_data_o.count[127] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[133:128] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[134] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[141:135] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[144:142] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[149:145] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T72,T155 | OUTPUT | |
otp_lc_data_o.count[150] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[158:151] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.count[159] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[161:160] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT | |
otp_lc_data_o.count[162] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[164:163] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[165] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[181:166] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[182] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[186:183] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT | |
otp_lc_data_o.count[187] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[193:188] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[194] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[195] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[196] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[204:197] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[205] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[215:206] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[216] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[228:217] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.count[229] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[238:230] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[239] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[245:240] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[246] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[273:247] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.count[274] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[276:275] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT | |
otp_lc_data_o.count[277] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[293:278] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT | |
otp_lc_data_o.count[294] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[302:295] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT | |
otp_lc_data_o.count[303] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[312:304] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[313] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[315:314] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[317:316] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[319:318] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.count[320] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[328:321] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT | |
otp_lc_data_o.count[329] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[332:330] | Yes | Yes | T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[333] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[337:334] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT | |
otp_lc_data_o.count[338] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[345:339] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[346] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[347] | Yes | Yes | *T22,*T155,*T157 | Yes | T22,T155,T157 | OUTPUT | |
otp_lc_data_o.count[348] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[349] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T158,T196 | OUTPUT | |
otp_lc_data_o.count[350] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[376:351] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.count[377] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[378] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.count[379] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:380] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[9:0] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[10] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[28:11] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[29] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[31:30] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.state[32] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[40:33] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T157,T158 | OUTPUT | |
otp_lc_data_o.state[41] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[49:42] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.state[50] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[52:51] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[53] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[57:54] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T63 | OUTPUT | |
otp_lc_data_o.state[58] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[60:59] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T157,T158 | OUTPUT | |
otp_lc_data_o.state[62:61] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[74:63] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T63 | OUTPUT | |
otp_lc_data_o.state[75] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[102:76] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[103] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[126:104] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T157,T158 | OUTPUT | |
otp_lc_data_o.state[127] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[128] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[129] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[131:130] | Yes | Yes | T4,T64,T21 | Yes | T21,T22,T63 | OUTPUT | |
otp_lc_data_o.state[132] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[138:133] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[139] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[145:140] | Yes | Yes | *T4,*T64,*T21 | Yes | T21,T22,T63 | OUTPUT | |
otp_lc_data_o.state[146] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[147] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.state[148] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[150:149] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[151] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[160:152] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[161] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[169:162] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.state[170] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[175:171] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[176] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[191:177] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.state[192] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[224:193] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.state[225] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[230:226] | Yes | Yes | *T4,*T64,*T63 | Yes | T63,T157,T158 | OUTPUT | |
otp_lc_data_o.state[232:231] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[234:233] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[235] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[246:236] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[247] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[252:248] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[253] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[262:254] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[263] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[268:264] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_lc_data_o.state[269] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[290:270] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[291] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[293:292] | Yes | Yes | T4,*T64,*T63 | Yes | T63,T157,T158 | OUTPUT | |
otp_lc_data_o.state[294] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[316:295] | Yes | Yes | *T45,*T46,*T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_lc_data_o.state[318:317] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319] | Yes | Yes | T4,T64,T63 | Yes | T63,T157,T158 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T47,T73,T74 | Yes | T47,T73,T74 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T45,T46,T47 | Yes | T4,T5,T6 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T20,T63,T58 | Yes | T45,T46,T108 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T6,T17,T26 | Yes | T46,T47,T103 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T20,T63,T58 | Yes | T45,T46,T108 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T6,T26,T18 | Yes | T46,T47,T74 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T5,T6,T17 | Yes | T5,T6,T17 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T59,T60,T61 | Yes | T59,T60,T61 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T127,T197,T198 | Yes | T127,T197,T198 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T199,T200,T201 | Yes | T199,T200,T201 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T59,T60,T61 | Yes | T59,T60,T61 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T127,T197,T198 | Yes | T127,T197,T198 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T199,T200,T202 | Yes | T199,T200,T202 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T59,T105,T60 | Yes | T59,T105,T60 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T59,T46,T47 | Yes | T6,T26,T18 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T6,T17,T26 | Yes | T6,T45,T59 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T59,T105,T60 | Yes | T59,T105,T60 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T47,T103,T110 | Yes | T5,T6,T26 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[48:0] | Yes | Yes | *T156,*T203,*T204 | Yes | T156,T203,T204 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[49] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[68:50] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[69] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[75:70] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[76] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[91:77] | Yes | Yes | *T203,*T204,*T134 | Yes | T203,T204,T134 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[92] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[96:93] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[97] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[127:98] | Yes | Yes | *T156,*T203,*T204 | Yes | T156,T203,T204 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[128] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[160:129] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[161] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[198:162] | Yes | Yes | *T4,*T5,*T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[199] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[240:200] | Yes | Yes | *T203,*T205,*T156 | Yes | T203,T205,T156 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[241] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:242] | Yes | Yes | T156,T203,T204 | Yes | T156,T203,T204 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T45,T47,T108 | Yes | T5,T6,T26 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T4,T5,T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T4,T5,T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T4,T5,T6 | Yes | T45,T46,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T45,T46,T47 | Yes | T4,T5,T6 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T45,T46,T47 | Yes | T5,T6,T17 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |