Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_device_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	147548	1			T75	299		T80	4		T131	1
values[2]	10241	1			T131	1		T235	1		T454	1
values[3]	3875	1			T131	1		T548	6		T659	71
values[4]	2690	1			T131	1		T548	3		T659	27
values[5]	1678	1			T131	1		T659	26		T796	1
values[6]	1184	1			T131	1		T659	15		T796	1
values[7]	988	1			T131	1		T659	30		T796	1
values[8]	685	1			T131	1		T659	24		T796	1
values[9]	595	1			T131	1		T659	29		T796	1
values[10]	500	1			T131	1		T659	24		T796	1
values[11]	516	1			T131	1		T659	12		T796	1
values[12]	443	1			T131	1		T659	3		T796	1
values[13]	409	1			T131	2		T796	1		T457	5
values[14]	403	1			T131	1		T796	1		T457	4
values[15]	413	1			T131	1		T796	1		T457	4
values[16]	423	1			T131	1		T796	1		T457	3
values[17]	396	1			T131	1		T796	1		T457	6
values[18]	367	1			T131	1		T796	1		T457	7
values[19]	376	1			T131	1		T796	1		T457	3
values[20]	389	1			T131	1		T796	1		T457	10
values[21]	328	1			T131	1		T796	1		T457	3
values[22]	368	1			T131	1		T796	1		T457	13
values[23]	376	1			T131	1		T796	1		T457	9
values[24]	353	1			T131	1		T796	1		T457	9
values[25]	382	1			T131	1		T796	1		T457	4
values[26]	376	1			T131	1		T796	1		T457	9
values[27]	428	1			T131	1		T796	1		T457	5
values[28]	345	1			T131	1		T796	1		T457	11
values[29]	373	1			T131	1		T796	1		T457	7
values[30]	406	1			T131	1		T796	1		T457	11
values[31]	382	1			T131	1		T796	1		T457	9
values[32]	376	1			T131	1		T796	1		T457	7
values[33]	334	1			T131	1		T796	1		T457	7
values[34]	385	1			T131	1		T796	1		T457	4
values[35]	317	1			T131	2		T796	1		T457	6
values[36]	386	1			T131	1		T796	1		T457	16
values[37]	350	1			T131	1		T796	1		T457	8
values[38]	331	1			T131	1		T796	1		T457	5
values[39]	368	1			T131	1		T796	1		T457	20
values[40]	306	1			T131	1		T796	1		T457	7
values[41]	294	1			T131	1		T796	1		T457	5
values[42]	341	1			T131	1		T796	1		T457	5
values[43]	363	1			T131	1		T796	1		T457	3
values[44]	366	1			T131	1		T796	1		T457	11
values[45]	292	1			T131	1		T796	1		T457	5
values[46]	309	1			T131	1		T796	1		T457	7
values[47]	293	1			T131	1		T796	1		T533	14
values[48]	319	1			T131	1		T796	1		T533	36
values[49]	314	1			T131	1		T796	1		T533	19
values[50]	289	1			T131	1		T796	1		T533	20
values[51]	280	1			T131	1		T796	1		T533	10
values[52]	312	1			T131	1		T796	1		T533	19
values[53]	302	1			T131	1		T796	1		T533	11
values[54]	266	1			T131	1		T796	1		T533	14
values[55]	306	1			T131	1		T796	1		T533	9
values[56]	238	1			T131	1		T796	1		T533	7
values[57]	212	1			T131	1		T796	1		T533	9
values[58]	211	1			T131	1		T796	1		T533	12
values[59]	188	1			T131	1		T796	1		T533	6
values[60]	186	1			T131	1		T796	1		T533	15
values[61]	182	1			T131	1		T796	1		T533	7
values[62]	139	1			T131	1		T796	1		T533	6
values[63]	182	1			T131	1		T796	1		T533	6
values[64]	155	1			T131	1		T796	1		T533	4
values[65]	149	1			T131	1		T796	1		T459	1
values[66]	156	1			T131	1		T796	1		T459	1
values[67]	150	1			T131	1		T796	1		T459	1
values[68]	111	1			T131	1		T796	1		T459	1
values[69]	135	1			T131	1		T796	1		T459	1
values[70]	118	1			T131	1		T796	1		T459	1
values[71]	136	1			T131	1		T796	1		T459	1
values[72]	124	1			T131	1		T796	2		T459	2
values[73]	85	1			T131	1		T796	1		T459	1
values[74]	114	1			T131	1		T796	1		T459	1
values[75]	86	1			T131	1		T796	1		T459	1
values[76]	80	1			T131	1		T796	1		T459	1
values[77]	101	1			T131	1		T796	1		T459	1
values[78]	94	1			T131	1		T796	1		T459	1
values[79]	79	1			T131	1		T796	1		T459	1
values[80]	92	1			T131	1		T796	1		T459	1
values[81]	99	1			T131	1		T796	1		T459	1
values[82]	97	1			T131	1		T796	1		T459	1
values[83]	114	1			T131	1		T796	1		T459	1
values[84]	106	1			T131	1		T796	1		T459	1
values[85]	82	1			T131	1		T796	1		T459	1
values[86]	84	1			T131	1		T796	1		T459	1
values[87]	84	1			T131	1		T796	1		T459	1
values[88]	91	1			T131	1		T796	1		T459	1
values[89]	87	1			T131	1		T796	2		T459	1
values[90]	80	1			T131	1		T796	1		T459	1
values[91]	99	1			T131	1		T796	1		T459	2
values[92]	99	1			T131	1		T796	1		T459	4
values[93]	110	1			T131	1		T796	1		T459	9
values[94]	110	1			T131	1		T796	1		T459	1
values[95]	98	1			T131	1		T796	1		T459	2
values[96]	78	1			T131	1		T796	1		T459	1
values[97]	80	1			T131	1		T796	1		T459	2
values[98]	101	1			T131	1		T796	1		T459	1
values[99]	100	1			T131	1		T796	2		T459	5
values[100]	88	1			T131	1		T796	1		T459	1
values[101]	71	1			T131	2		T796	1		T459	4
values[102]	106	1			T131	1		T796	1		T459	1
values[103]	91	1			T131	1		T796	1		T459	2
values[104]	78	1			T131	1		T796	1		T459	4
values[105]	76	1			T131	1		T796	1		T459	1
values[106]	73	1			T131	1		T796	1		T459	7
values[107]	75	1			T131	1		T796	1		T459	1
values[108]	67	1			T131	1		T796	1		T459	1
values[109]	80	1			T131	1		T796	1		T459	2
values[110]	77	1			T131	1		T796	1		T459	3
values[111]	79	1			T131	1		T796	1		T459	1
values[112]	77	1			T131	1		T796	1		T459	2
values[113]	80	1			T131	1		T796	1		T459	1
values[114]	83	1			T131	1		T796	1		T459	1
values[115]	79	1			T131	1		T796	1		T459	2
values[116]	78	1			T131	1		T796	1		T459	3
values[117]	87	1			T131	2		T796	1		T459	7
values[118]	82	1			T131	3		T796	1		T459	1
values[119]	73	1			T131	2		T796	1		T459	3
values[120]	64	1			T131	1		T796	1		T459	1
values[121]	68	1			T131	2		T796	1		T459	2
values[122]	62	1			T131	1		T796	1		T459	2
values[123]	71	1			T131	2		T796	7		T459	1
values[124]	68	1			T131	3		T796	2		T459	2
values[125]	69	1			T131	2		T796	1		T459	1
values[126]	88	1			T131	4		T796	2		T459	1
values[127]	711	1			T131	39		T796	39		T459	26
values[128]	7025	1			T131	290		T796	395		T459	289