Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.csrng_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	166963	1			T75	304		T80	11		T156	31
values[2]	4641	1			T156	63		T235	1		T454	1
values[3]	2126	1			T156	40		T546	1		T545	49
values[4]	1755	1			T156	29		T546	1		T545	38
values[5]	1387	1			T156	46		T546	1		T545	40
values[6]	1092	1			T156	21		T546	1		T545	28
values[7]	874	1			T156	11		T546	1		T545	35
values[8]	737	1			T156	6		T546	1		T545	37
values[9]	661	1			T156	4		T546	1		T545	31
values[10]	609	1			T156	3		T546	1		T545	21
values[11]	607	1			T156	3		T546	1		T545	14
values[12]	614	1			T156	6		T546	1		T545	16
values[13]	521	1			T156	3		T546	1		T545	7
values[14]	436	1			T156	11		T546	1		T545	2
values[15]	405	1			T156	11		T546	1		T545	4
values[16]	398	1			T156	19		T546	1		T545	5
values[17]	380	1			T156	22		T546	1		T545	7
values[18]	287	1			T156	21		T546	1		T545	4
values[19]	259	1			T156	15		T546	1		T545	8
values[20]	259	1			T156	36		T546	1		T545	3
values[21]	168	1			T156	22		T546	1		T545	5
values[22]	228	1			T156	18		T546	1		T545	7
values[23]	244	1			T156	11		T546	1		T545	3
values[24]	192	1			T156	9		T546	1		T545	3
values[25]	190	1			T156	20		T546	1		T545	4
values[26]	183	1			T156	22		T546	1		T545	4
values[27]	177	1			T156	26		T546	1		T545	4
values[28]	144	1			T156	37		T546	1		T545	4
values[29]	119	1			T156	16		T546	1		T545	6
values[30]	114	1			T156	5		T546	1		T545	3
values[31]	107	1			T546	1		T545	5		T796	1
values[32]	97	1			T546	1		T545	3		T796	1
values[33]	95	1			T546	1		T545	3		T796	1
values[34]	107	1			T546	1		T545	5		T796	1
values[35]	90	1			T546	1		T545	6		T796	1
values[36]	89	1			T546	1		T545	3		T796	1
values[37]	99	1			T546	1		T545	6		T796	1
values[38]	112	1			T546	1		T545	3		T796	1
values[39]	120	1			T546	1		T545	2		T796	1
values[40]	118	1			T546	1		T545	3		T796	1
values[41]	121	1			T546	1		T545	5		T796	1
values[42]	110	1			T546	1		T545	4		T796	1
values[43]	100	1			T546	1		T545	5		T796	1
values[44]	88	1			T546	1		T545	5		T796	1
values[45]	80	1			T546	1		T545	4		T796	1
values[46]	56	1			T546	1		T545	5		T796	1
values[47]	66	1			T546	1		T545	5		T796	1
values[48]	71	1			T546	1		T545	7		T796	1
values[49]	51	1			T546	1		T545	8		T796	1
values[50]	56	1			T546	1		T545	3		T796	1
values[51]	62	1			T546	1		T545	5		T796	1
values[52]	68	1			T546	1		T545	3		T796	1
values[53]	63	1			T546	1		T545	9		T796	1
values[54]	57	1			T546	1		T545	3		T796	1
values[55]	70	1			T546	1		T545	4		T796	1
values[56]	51	1			T546	1		T545	6		T796	1
values[57]	59	1			T546	1		T545	4		T796	1
values[58]	65	1			T546	1		T545	12		T796	1
values[59]	60	1			T546	1		T545	10		T796	1
values[60]	57	1			T546	1		T545	5		T796	1
values[61]	63	1			T546	1		T545	3		T796	1
values[62]	58	1			T546	1		T545	4		T796	1
values[63]	47	1			T546	1		T545	2		T796	1
values[64]	52	1			T546	1		T545	4		T796	2
values[65]	59	1			T546	1		T545	6		T796	1
values[66]	62	1			T546	1		T545	10		T796	1
values[67]	48	1			T546	1		T545	4		T796	1
values[68]	59	1			T546	1		T545	2		T796	1
values[69]	56	1			T546	1		T545	4		T796	1
values[70]	64	1			T546	1		T545	9		T796	1
values[71]	61	1			T546	1		T545	3		T796	1
values[72]	54	1			T546	1		T545	5		T796	1
values[73]	64	1			T546	1		T545	4		T796	1
values[74]	67	1			T546	1		T545	6		T796	1
values[75]	54	1			T546	1		T545	4		T796	1
values[76]	57	1			T546	1		T545	4		T796	1
values[77]	66	1			T546	2		T545	7		T796	1
values[78]	68	1			T546	1		T545	8		T796	1
values[79]	57	1			T546	1		T545	6		T796	1
values[80]	54	1			T546	1		T545	6		T796	1
values[81]	71	1			T546	1		T545	7		T796	1
values[82]	66	1			T546	1		T545	6		T796	1
values[83]	73	1			T546	1		T545	5		T796	1
values[84]	65	1			T546	1		T545	3		T796	1
values[85]	71	1			T546	1		T545	3		T796	1
values[86]	74	1			T546	1		T545	4		T796	1
values[87]	78	1			T546	1		T545	5		T796	1
values[88]	67	1			T546	1		T545	6		T796	1
values[89]	71	1			T546	1		T545	6		T796	1
values[90]	54	1			T546	1		T545	3		T796	1
values[91]	71	1			T546	1		T545	4		T796	1
values[92]	68	1			T546	1		T545	7		T796	2
values[93]	100	1			T546	1		T545	12		T796	2
values[94]	86	1			T546	1		T545	11		T796	4
values[95]	77	1			T546	1		T545	9		T796	9
values[96]	77	1			T546	1		T545	8		T796	5
values[97]	102	1			T546	1		T545	9		T796	6
values[98]	87	1			T546	1		T545	6		T796	2
values[99]	90	1			T546	1		T545	5		T796	2
values[100]	97	1			T546	1		T545	8		T796	5
values[101]	88	1			T546	1		T545	3		T796	8
values[102]	90	1			T546	1		T545	2		T796	6
values[103]	101	1			T546	5		T545	5		T796	1
values[104]	102	1			T546	2		T545	7		T796	2
values[105]	91	1			T546	1		T545	8		T796	1
values[106]	91	1			T546	2		T545	5		T796	1
values[107]	108	1			T546	3		T545	8		T796	1
values[108]	110	1			T546	4		T545	8		T796	3
values[109]	98	1			T546	2		T545	8		T796	3
values[110]	104	1			T546	2		T545	4		T796	2
values[111]	86	1			T546	1		T545	12		T796	1
values[112]	88	1			T546	1		T545	8		T796	5
values[113]	88	1			T546	2		T545	5		T796	2
values[114]	96	1			T546	3		T545	8		T796	1
values[115]	105	1			T546	2		T545	11		T796	1
values[116]	100	1			T546	3		T545	16		T796	1
values[117]	102	1			T546	3		T545	18		T796	1
values[118]	92	1			T546	3		T545	11		T796	2
values[119]	97	1			T546	1		T545	4		T796	1
values[120]	101	1			T546	2		T545	6		T796	1
values[121]	107	1			T546	5		T545	5		T796	1
values[122]	135	1			T546	2		T545	8		T796	3
values[123]	143	1			T546	1		T545	6		T796	3
values[124]	244	1			T546	3		T545	21		T796	2
values[125]	450	1			T546	1		T545	54		T796	1
values[126]	928	1			T546	13		T545	128		T796	11
values[127]	2548	1			T546	145		T545	65		T796	103
values[128]	4091	1			T546	279		T545	2		T796	209