Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.edn1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	167284	1			T75	795		T80	7		T156	1
values[2]	4941	1			T156	1		T235	1		T454	4
values[3]	2744	1			T156	6		T545	19		T549	1
values[4]	1818	1			T156	3		T545	31		T659	3
values[5]	1258	1			T156	2		T545	17		T659	3
values[6]	1134	1			T156	5		T545	17		T659	4
values[7]	971	1			T156	3		T545	9		T659	2
values[8]	810	1			T156	3		T545	7		T659	1
values[9]	712	1			T156	1		T545	4		T659	2
values[10]	702	1			T156	3		T545	8		T659	3
values[11]	741	1			T156	4		T545	3		T659	3
values[12]	567	1			T156	1		T545	3		T659	3
values[13]	514	1			T156	3		T545	4		T659	1
values[14]	451	1			T156	1		T545	2		T659	1
values[15]	362	1			T156	6		T545	2		T659	1
values[16]	346	1			T156	3		T545	6		T659	3
values[17]	381	1			T156	4		T545	10		T659	5
values[18]	382	1			T156	4		T545	10		T659	3
values[19]	385	1			T156	4		T545	7		T659	2
values[20]	345	1			T156	4		T545	5		T659	1
values[21]	279	1			T156	1		T545	2		T659	2
values[22]	346	1			T156	2		T545	2		T659	2
values[23]	304	1			T156	3		T545	6		T659	1
values[24]	310	1			T156	1		T545	3		T659	3
values[25]	316	1			T156	5		T545	2		T659	5
values[26]	300	1			T156	3		T545	2		T659	8
values[27]	213	1			T156	2		T545	4		T659	2
values[28]	210	1			T156	2		T545	13		T659	2
values[29]	153	1			T156	4		T545	7		T659	5
values[30]	140	1			T156	2		T545	5		T659	5
values[31]	138	1			T156	2		T545	12		T659	3
values[32]	151	1			T156	4		T545	7		T659	3
values[33]	150	1			T156	3		T545	9		T659	3
values[34]	154	1			T156	1		T545	9		T659	1
values[35]	154	1			T156	1		T545	15		T659	2
values[36]	123	1			T156	3		T545	16		T659	2
values[37]	100	1			T156	2		T545	6		T659	3
values[38]	84	1			T156	2		T659	2		T796	1
values[39]	93	1			T156	2		T659	2		T796	1
values[40]	82	1			T156	2		T659	3		T796	1
values[41]	60	1			T156	2		T659	1		T796	1
values[42]	76	1			T156	1		T659	7		T796	1
values[43]	61	1			T156	1		T659	6		T796	1
values[44]	51	1			T156	2		T659	5		T796	1
values[45]	48	1			T156	2		T659	5		T796	1
values[46]	51	1			T156	3		T659	2		T796	1
values[47]	43	1			T156	1		T659	4		T796	1
values[48]	58	1			T156	7		T659	1		T796	1
values[49]	54	1			T156	7		T659	2		T796	1
values[50]	45	1			T156	3		T659	2		T796	1
values[51]	57	1			T156	4		T659	4		T796	1
values[52]	62	1			T156	4		T659	7		T796	1
values[53]	66	1			T156	3		T659	4		T796	1
values[54]	56	1			T156	1		T659	1		T796	1
values[55]	67	1			T156	1		T659	3		T796	1
values[56]	55	1			T156	5		T659	4		T796	1
values[57]	51	1			T156	1		T659	1		T796	1
values[58]	47	1			T156	1		T659	4		T796	1
values[59]	50	1			T156	5		T659	2		T796	1
values[60]	58	1			T156	7		T659	1		T796	1
values[61]	55	1			T156	9		T659	1		T796	1
values[62]	57	1			T156	3		T659	1		T796	1
values[63]	52	1			T156	1		T659	2		T796	1
values[64]	63	1			T156	2		T659	2		T796	1
values[65]	73	1			T156	4		T659	2		T796	1
values[66]	62	1			T156	2		T659	5		T796	1
values[67]	50	1			T156	4		T659	1		T796	1
values[68]	43	1			T156	5		T659	1		T796	1
values[69]	55	1			T156	5		T659	4		T796	1
values[70]	51	1			T156	2		T659	11		T796	1
values[71]	55	1			T156	4		T659	3		T796	1
values[72]	47	1			T156	1		T659	2		T796	1
values[73]	53	1			T156	3		T659	4		T796	1
values[74]	56	1			T156	5		T659	8		T796	1
values[75]	63	1			T156	2		T659	6		T796	1
values[76]	64	1			T156	1		T659	2		T796	1
values[77]	45	1			T156	3		T659	2		T796	1
values[78]	42	1			T156	5		T659	1		T796	1
values[79]	58	1			T156	2		T659	3		T796	1
values[80]	53	1			T156	1		T659	1		T796	1
values[81]	53	1			T156	1		T659	2		T796	1
values[82]	60	1			T156	3		T659	1		T796	1
values[83]	62	1			T156	5		T659	2		T796	1
values[84]	68	1			T156	7		T659	2		T796	1
values[85]	58	1			T156	4		T659	2		T796	1
values[86]	60	1			T156	1		T659	3		T796	1
values[87]	68	1			T156	2		T659	1		T796	1
values[88]	64	1			T156	2		T659	1		T796	1
values[89]	73	1			T156	1		T659	4		T796	1
values[90]	69	1			T156	1		T659	2		T796	1
values[91]	58	1			T156	1		T659	2		T796	1
values[92]	61	1			T156	3		T659	1		T796	1
values[93]	75	1			T156	4		T659	3		T796	1
values[94]	74	1			T156	1		T659	1		T796	1
values[95]	69	1			T156	1		T659	2		T796	1
values[96]	57	1			T156	1		T659	1		T796	1
values[97]	83	1			T156	2		T659	3		T796	1
values[98]	64	1			T156	1		T659	1		T796	1
values[99]	55	1			T156	1		T659	1		T796	1
values[100]	58	1			T156	2		T659	2		T796	1
values[101]	82	1			T156	5		T659	6		T796	1
values[102]	66	1			T156	2		T659	3		T796	1
values[103]	89	1			T156	9		T659	2		T796	1
values[104]	77	1			T156	2		T659	1		T796	1
values[105]	70	1			T156	6		T659	3		T796	1
values[106]	92	1			T156	5		T659	1		T796	1
values[107]	89	1			T156	2		T659	1		T796	1
values[108]	88	1			T156	4		T659	1		T796	1
values[109]	82	1			T156	6		T659	2		T796	1
values[110]	82	1			T156	2		T659	4		T796	1
values[111]	97	1			T156	1		T659	4		T796	1
values[112]	82	1			T156	6		T659	1		T796	2
values[113]	71	1			T156	4		T659	2		T796	1
values[114]	83	1			T156	4		T659	2		T796	4
values[115]	84	1			T156	3		T659	5		T796	1
values[116]	101	1			T156	3		T659	2		T796	1
values[117]	74	1			T156	2		T659	1		T796	1
values[118]	79	1			T156	4		T659	1		T796	1
values[119]	95	1			T156	7		T659	3		T796	4
values[120]	93	1			T156	5		T659	4		T796	7
values[121]	91	1			T156	2		T659	6		T796	2
values[122]	108	1			T156	4		T659	12		T796	1
values[123]	120	1			T156	6		T659	5		T796	1
values[124]	236	1			T156	20		T659	12		T796	2
values[125]	529	1			T156	39		T659	47		T796	2
values[126]	763	1			T156	36		T659	64		T796	6
values[127]	1926	1			T156	29		T659	38		T796	123
values[128]	2957	1			T156	3		T659	4		T796	268