Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.hmac_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	168129	1			T80	92		T81	803		T82	2
values[2]	5279	1			T435	2		T520	1		T510	1
values[3]	2641	1			T510	1		T516	77		T447	4
values[4]	2096	1			T510	1		T516	54		T447	3
values[5]	1650	1			T510	1		T516	18		T447	2
values[6]	1379	1			T510	1		T516	1		T447	3
values[7]	1163	1			T510	1		T447	8		T824	3
values[8]	1049	1			T510	1		T447	7		T824	1
values[9]	953	1			T510	1		T447	1		T824	2
values[10]	937	1			T510	1		T447	3		T824	2
values[11]	834	1			T510	1		T447	2		T824	2
values[12]	804	1			T510	1		T447	4		T824	1
values[13]	620	1			T510	1		T447	9		T824	4
values[14]	576	1			T510	1		T447	17		T824	7
values[15]	523	1			T510	1		T447	10		T824	3
values[16]	564	1			T510	1		T447	13		T824	1
values[17]	412	1			T510	1		T447	12		T824	1
values[18]	374	1			T510	1		T447	6		T824	3
values[19]	462	1			T510	1		T447	5		T824	2
values[20]	485	1			T510	1		T447	11		T824	1
values[21]	431	1			T510	1		T447	2		T824	2
values[22]	379	1			T510	1		T447	5		T824	3
values[23]	387	1			T510	1		T447	3		T824	2
values[24]	382	1			T510	1		T447	4		T824	4
values[25]	325	1			T510	1		T447	3		T824	1
values[26]	251	1			T510	1		T447	5		T824	3
values[27]	182	1			T510	1		T447	9		T824	4
values[28]	141	1			T510	1		T447	5		T824	7
values[29]	159	1			T510	1		T447	4		T824	6
values[30]	120	1			T510	1		T447	2		T824	1
values[31]	97	1			T510	1		T447	3		T824	2
values[32]	115	1			T510	1		T447	6		T824	1
values[33]	102	1			T510	1		T447	2		T824	2
values[34]	93	1			T510	1		T447	7		T824	2
values[35]	109	1			T510	1		T447	5		T824	7
values[36]	93	1			T510	1		T447	3		T824	2
values[37]	77	1			T510	1		T447	9		T824	2
values[38]	92	1			T510	1		T447	18		T824	4
values[39]	122	1			T510	1		T447	41		T824	2
values[40]	105	1			T510	1		T447	33		T824	8
values[41]	124	1			T510	1		T447	42		T824	7
values[42]	138	1			T510	2		T447	41		T824	2
values[43]	154	1			T510	1		T447	39		T824	4
values[44]	119	1			T510	1		T447	26		T824	2
values[45]	106	1			T510	1		T447	25		T824	3
values[46]	83	1			T510	1		T447	6		T824	2
values[47]	62	1			T510	1		T447	2		T824	2
values[48]	61	1			T510	1		T824	2		T823	1
values[49]	98	1			T510	1		T824	5		T823	1
values[50]	67	1			T510	1		T824	3		T823	1
values[51]	41	1			T510	1		T824	1		T823	1
values[52]	43	1			T510	1		T824	2		T823	1
values[53]	39	1			T510	1		T824	3		T823	1
values[54]	50	1			T510	1		T824	4		T823	1
values[55]	47	1			T510	1		T824	2		T823	1
values[56]	47	1			T510	1		T824	2		T823	1
values[57]	46	1			T510	1		T824	2		T823	1
values[58]	60	1			T510	1		T824	9		T823	1
values[59]	58	1			T510	1		T824	12		T823	1
values[60]	44	1			T510	1		T824	3		T823	1
values[61]	44	1			T510	1		T824	7		T823	1
values[62]	42	1			T510	1		T824	6		T823	1
values[63]	45	1			T510	1		T824	3		T823	1
values[64]	44	1			T510	1		T824	3		T823	1
values[65]	55	1			T510	1		T824	6		T823	1
values[66]	47	1			T510	1		T824	4		T823	1
values[67]	47	1			T510	1		T824	1		T823	1
values[68]	35	1			T510	1		T824	3		T823	1
values[69]	35	1			T510	1		T824	3		T823	1
values[70]	45	1			T510	1		T824	7		T823	1
values[71]	46	1			T510	1		T824	3		T823	1
values[72]	47	1			T510	1		T824	1		T823	1
values[73]	39	1			T510	1		T824	1		T823	1
values[74]	37	1			T510	1		T824	1		T823	1
values[75]	38	1			T510	1		T824	1		T823	1
values[76]	50	1			T510	1		T824	2		T823	3
values[77]	54	1			T510	1		T824	2		T823	5
values[78]	54	1			T510	1		T824	2		T823	12
values[79]	47	1			T510	1		T824	4		T823	6
values[80]	44	1			T510	1		T824	1		T823	1
values[81]	67	1			T510	1		T824	3		T823	7
values[82]	62	1			T510	1		T824	2		T823	16
values[83]	59	1			T510	1		T824	1		T823	12
values[84]	63	1			T510	6		T824	3		T823	2
values[85]	65	1			T510	5		T824	1		T823	2
values[86]	63	1			T510	5		T824	2		T823	2
values[87]	61	1			T510	1		T824	8		T823	2
values[88]	54	1			T510	1		T824	2		T823	4
values[89]	75	1			T510	2		T824	5		T823	4
values[90]	68	1			T510	4		T824	1		T823	4
values[91]	60	1			T510	2		T824	1		T823	3
values[92]	69	1			T510	5		T824	4		T823	2
values[93]	64	1			T510	3		T824	3		T823	2
values[94]	74	1			T510	3		T824	7		T823	7
values[95]	64	1			T510	8		T824	2		T823	2
values[96]	61	1			T510	3		T824	2		T823	2
values[97]	61	1			T510	3		T824	6		T823	2
values[98]	73	1			T510	3		T824	5		T823	4
values[99]	68	1			T510	1		T824	2		T823	4
values[100]	63	1			T510	3		T824	4		T823	1
values[101]	67	1			T510	3		T824	4		T823	3
values[102]	55	1			T510	2		T824	4		T823	1
values[103]	59	1			T510	1		T824	1		T823	1
values[104]	51	1			T510	1		T824	4		T823	1
values[105]	58	1			T510	1		T824	4		T823	1
values[106]	80	1			T510	3		T824	3		T823	1
values[107]	91	1			T510	7		T824	8		T823	2
values[108]	79	1			T510	3		T824	3		T823	3
values[109]	65	1			T510	2		T824	5		T823	2
values[110]	70	1			T510	1		T824	8		T823	1
values[111]	78	1			T510	4		T824	6		T823	2
values[112]	78	1			T510	3		T824	7		T823	2
values[113]	74	1			T510	1		T824	8		T823	2
values[114]	88	1			T510	3		T824	7		T823	4
values[115]	83	1			T510	3		T824	5		T823	2
values[116]	86	1			T510	2		T824	4		T823	2
values[117]	76	1			T510	3		T824	4		T823	2
values[118]	79	1			T510	2		T824	7		T823	3
values[119]	77	1			T510	2		T824	8		T823	2
values[120]	62	1			T510	2		T824	2		T823	1
values[121]	68	1			T510	1		T824	5		T823	1
values[122]	100	1			T510	1		T824	7		T823	2
values[123]	104	1			T510	2		T824	4		T823	2
values[124]	164	1			T510	3		T824	7		T823	2
values[125]	302	1			T510	1		T824	11		T823	1
values[126]	662	1			T510	10		T824	10		T823	13
values[127]	2346	1			T510	102		T824	11		T823	91
values[128]	3805	1			T510	182		T824	1		T823	161