Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pwm_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	145157	1			T80	89		T81	251		T82	7
values[2]	10761	1			T80	3		T82	1		T389	1
values[3]	4543	1			T510	2		T396	5		T499	1
values[4]	2514	1			T510	2		T396	7		T447	92
values[5]	1585	1			T510	2		T396	10		T447	50
values[6]	1143	1			T510	2		T396	17		T447	41
values[7]	856	1			T510	2		T396	11		T447	24
values[8]	623	1			T510	2		T396	9		T447	7
values[9]	552	1			T510	2		T396	8		T447	2
values[10]	427	1			T510	2		T396	13		T469	8
values[11]	435	1			T510	2		T396	8		T469	8
values[12]	350	1			T510	2		T396	4		T469	1
values[13]	426	1			T510	2		T396	3		T829	1
values[14]	346	1			T510	2		T396	6		T829	1
values[15]	411	1			T510	2		T396	3		T829	1
values[16]	394	1			T510	2		T396	3		T829	1
values[17]	314	1			T510	2		T396	10		T829	1
values[18]	376	1			T510	2		T396	3		T829	1
values[19]	390	1			T510	2		T396	6		T829	1
values[20]	335	1			T510	2		T396	6		T829	1
values[21]	335	1			T510	2		T396	13		T829	1
values[22]	380	1			T510	2		T396	14		T829	1
values[23]	372	1			T510	2		T396	5		T829	1
values[24]	344	1			T510	2		T396	4		T829	1
values[25]	323	1			T510	2		T396	5		T829	1
values[26]	383	1			T510	2		T396	2		T829	1
values[27]	319	1			T510	2		T396	4		T829	1
values[28]	357	1			T510	2		T396	3		T829	1
values[29]	335	1			T510	2		T396	6		T829	1
values[30]	368	1			T510	3		T396	3		T829	1
values[31]	341	1			T510	2		T396	6		T829	1
values[32]	379	1			T510	2		T396	4		T829	1
values[33]	371	1			T510	2		T396	14		T829	1
values[34]	379	1			T510	2		T396	17		T829	1
values[35]	346	1			T510	2		T396	8		T829	1
values[36]	348	1			T510	2		T396	6		T829	1
values[37]	321	1			T510	2		T396	12		T829	1
values[38]	302	1			T510	2		T396	7		T829	1
values[39]	275	1			T510	2		T396	3		T829	1
values[40]	310	1			T510	2		T396	2		T829	1
values[41]	331	1			T510	2		T396	6		T829	1
values[42]	336	1			T510	2		T396	3		T829	1
values[43]	303	1			T510	2		T396	7		T829	1
values[44]	312	1			T510	2		T396	3		T829	1
values[45]	333	1			T510	2		T396	4		T829	1
values[46]	273	1			T510	2		T396	6		T829	1
values[47]	317	1			T510	2		T396	6		T829	1
values[48]	368	1			T510	2		T396	15		T829	1
values[49]	346	1			T510	2		T396	12		T829	1
values[50]	365	1			T510	2		T396	9		T829	1
values[51]	312	1			T510	2		T396	5		T829	1
values[52]	294	1			T510	2		T396	5		T829	1
values[53]	274	1			T510	2		T396	5		T829	1
values[54]	280	1			T510	2		T396	2		T829	1
values[55]	255	1			T510	2		T396	7		T829	1
values[56]	285	1			T510	2		T396	6		T829	1
values[57]	262	1			T510	2		T396	6		T829	2
values[58]	259	1			T510	2		T396	2		T829	1
values[59]	268	1			T510	2		T396	4		T829	1
values[60]	285	1			T510	2		T396	5		T829	1
values[61]	277	1			T510	2		T396	8		T829	1
values[62]	286	1			T510	2		T396	11		T829	1
values[63]	268	1			T510	2		T396	12		T829	1
values[64]	290	1			T510	2		T396	23		T829	1
values[65]	249	1			T510	2		T396	7		T829	1
values[66]	189	1			T510	2		T396	12		T829	1
values[67]	197	1			T510	3		T396	18		T829	1
values[68]	190	1			T510	2		T396	16		T829	1
values[69]	147	1			T510	2		T396	9		T829	1
values[70]	127	1			T510	2		T396	12		T829	1
values[71]	93	1			T510	2		T396	10		T829	1
values[72]	116	1			T510	2		T396	18		T829	1
values[73]	100	1			T510	2		T396	6		T829	1
values[74]	97	1			T510	2		T396	9		T829	1
values[75]	89	1			T510	2		T396	7		T829	1
values[76]	79	1			T510	2		T396	3		T829	1
values[77]	75	1			T510	2		T396	2		T829	1
values[78]	89	1			T510	2		T396	5		T829	1
values[79]	82	1			T510	2		T396	7		T829	1
values[80]	73	1			T510	2		T396	5		T829	1
values[81]	59	1			T510	3		T396	7		T829	1
values[82]	83	1			T510	2		T396	7		T829	1
values[83]	70	1			T510	3		T396	9		T829	1
values[84]	61	1			T510	2		T396	3		T829	1
values[85]	73	1			T510	2		T396	3		T829	1
values[86]	75	1			T510	2		T396	4		T829	1
values[87]	87	1			T510	2		T396	8		T829	1
values[88]	64	1			T510	2		T396	5		T829	1
values[89]	57	1			T510	2		T396	5		T829	1
values[90]	62	1			T510	2		T396	4		T829	1
values[91]	68	1			T510	2		T396	4		T829	1
values[92]	58	1			T510	2		T396	2		T829	1
values[93]	58	1			T510	2		T396	1		T829	1
values[94]	58	1			T510	2		T396	3		T829	1
values[95]	48	1			T510	2		T396	3		T829	1
values[96]	56	1			T510	2		T396	1		T829	1
values[97]	60	1			T510	3		T396	4		T829	1
values[98]	51	1			T510	3		T396	8		T829	1
values[99]	67	1			T510	4		T396	4		T829	1
values[100]	67	1			T510	4		T396	4		T829	1
values[101]	51	1			T510	2		T396	2		T829	1
values[102]	97	1			T510	3		T396	9		T829	1
values[103]	77	1			T510	2		T396	3		T829	1
values[104]	66	1			T510	2		T396	4		T829	1
values[105]	81	1			T510	5		T396	3		T829	1
values[106]	71	1			T510	13		T396	3		T829	1
values[107]	60	1			T510	4		T396	2		T829	1
values[108]	55	1			T510	4		T396	1		T829	1
values[109]	61	1			T510	7		T396	2		T829	1
values[110]	59	1			T510	2		T396	4		T829	1
values[111]	69	1			T510	7		T396	4		T829	1
values[112]	76	1			T510	4		T396	6		T829	1
values[113]	60	1			T510	4		T396	7		T829	1
values[114]	54	1			T510	7		T396	3		T829	1
values[115]	56	1			T510	6		T396	1		T829	1
values[116]	58	1			T510	4		T396	2		T829	1
values[117]	55	1			T510	4		T396	3		T829	1
values[118]	48	1			T510	2		T396	7		T829	1
values[119]	73	1			T510	5		T396	9		T829	1
values[120]	70	1			T510	4		T396	9		T829	1
values[121]	61	1			T510	2		T396	4		T829	1
values[122]	57	1			T510	2		T396	7		T829	1
values[123]	64	1			T510	6		T396	5		T829	1
values[124]	59	1			T510	4		T396	3		T829	1
values[125]	63	1			T510	3		T396	2		T829	1
values[126]	132	1			T510	9		T396	3		T829	2
values[127]	877	1			T510	69		T396	3		T829	33
values[128]	6342	1			T510	621		T396	2		T829	344