Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_device_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	144849	1			T80	109		T81	255		T82	5
values[2]	10619	1			T80	1		T81	1		T435	1
values[3]	4219	1			T396	96		T446	1		T410	1
values[4]	2447	1			T396	35		T446	1		T405	1
values[5]	1647	1			T396	18		T446	1		T405	1
values[6]	1100	1			T396	9		T446	1		T405	1
values[7]	750	1			T396	4		T446	1		T405	1
values[8]	573	1			T396	11		T446	1		T405	1
values[9]	386	1			T396	5		T446	1		T405	1
values[10]	337	1			T396	10		T446	1		T405	1
values[11]	285	1			T396	7		T446	1		T405	1
values[12]	240	1			T396	3		T446	1		T405	1
values[13]	225	1			T396	3		T446	1		T405	1
values[14]	241	1			T396	4		T446	1		T405	1
values[15]	250	1			T446	1		T405	1		T442	1
values[16]	275	1			T446	1		T405	1		T442	1
values[17]	286	1			T446	1		T405	1		T442	1
values[18]	237	1			T446	1		T405	1		T442	1
values[19]	238	1			T446	1		T405	1		T442	1
values[20]	221	1			T446	1		T405	1		T442	1
values[21]	249	1			T446	1		T405	1		T442	1
values[22]	295	1			T446	1		T405	1		T442	1
values[23]	237	1			T446	1		T405	1		T442	1
values[24]	230	1			T446	1		T405	1		T442	1
values[25]	217	1			T446	1		T405	1		T442	1
values[26]	174	1			T446	1		T405	1		T442	1
values[27]	225	1			T446	1		T405	1		T442	1
values[28]	214	1			T446	1		T405	1		T442	1
values[29]	243	1			T446	1		T405	1		T442	1
values[30]	255	1			T446	1		T405	1		T442	1
values[31]	217	1			T446	1		T405	1		T442	1
values[32]	187	1			T446	1		T405	1		T442	1
values[33]	205	1			T446	1		T405	1		T442	1
values[34]	249	1			T446	1		T405	1		T442	1
values[35]	206	1			T446	1		T405	1		T442	1
values[36]	233	1			T446	1		T405	1		T442	1
values[37]	193	1			T446	1		T405	1		T442	1
values[38]	222	1			T446	1		T405	1		T442	1
values[39]	213	1			T446	1		T405	1		T442	1
values[40]	202	1			T446	1		T405	1		T442	1
values[41]	199	1			T446	1		T405	1		T442	1
values[42]	202	1			T446	1		T405	1		T442	1
values[43]	182	1			T446	1		T405	1		T442	1
values[44]	167	1			T446	1		T405	1		T442	1
values[45]	196	1			T446	1		T405	1		T442	1
values[46]	189	1			T446	1		T405	1		T442	1
values[47]	195	1			T446	1		T405	1		T442	1
values[48]	197	1			T446	1		T405	1		T442	1
values[49]	201	1			T446	1		T405	1		T442	1
values[50]	171	1			T446	1		T405	1		T442	1
values[51]	192	1			T446	1		T405	1		T442	1
values[52]	168	1			T446	1		T405	1		T442	1
values[53]	164	1			T446	1		T405	1		T442	1
values[54]	147	1			T446	1		T405	1		T442	1
values[55]	162	1			T446	1		T405	1		T442	1
values[56]	167	1			T446	1		T405	1		T442	1
values[57]	178	1			T446	1		T405	1		T442	1
values[58]	132	1			T446	1		T405	1		T442	1
values[59]	158	1			T446	1		T405	1		T442	1
values[60]	159	1			T446	1		T405	1		T442	1
values[61]	138	1			T446	1		T405	1		T442	1
values[62]	118	1			T446	1		T405	1		T442	1
values[63]	138	1			T446	1		T405	1		T442	1
values[64]	118	1			T446	1		T405	1		T442	1
values[65]	96	1			T446	1		T405	1		T442	1
values[66]	112	1			T446	2		T405	1		T442	1
values[67]	102	1			T446	1		T405	1		T442	1
values[68]	90	1			T446	1		T405	1		T442	1
values[69]	86	1			T446	1		T405	1		T442	1
values[70]	82	1			T446	1		T405	1		T442	1
values[71]	88	1			T446	1		T405	1		T442	1
values[72]	106	1			T446	1		T405	1		T442	1
values[73]	71	1			T446	1		T405	1		T442	1
values[74]	82	1			T446	1		T405	1		T442	1
values[75]	77	1			T446	1		T405	1		T442	1
values[76]	92	1			T446	1		T405	1		T442	1
values[77]	87	1			T446	1		T405	1		T442	1
values[78]	80	1			T446	5		T405	1		T442	1
values[79]	80	1			T446	3		T405	1		T442	1
values[80]	76	1			T446	3		T405	1		T442	1
values[81]	85	1			T446	1		T405	1		T442	1
values[82]	93	1			T446	3		T405	1		T442	1
values[83]	82	1			T446	4		T405	1		T442	1
values[84]	106	1			T446	9		T405	1		T442	1
values[85]	76	1			T446	1		T405	1		T442	1
values[86]	88	1			T446	3		T405	1		T442	1
values[87]	98	1			T446	1		T405	1		T442	1
values[88]	92	1			T446	3		T405	1		T442	1
values[89]	92	1			T446	1		T405	1		T442	1
values[90]	87	1			T446	3		T405	1		T442	1
values[91]	88	1			T446	3		T405	1		T442	1
values[92]	81	1			T446	4		T405	1		T442	1
values[93]	81	1			T446	5		T405	1		T442	1
values[94]	84	1			T446	2		T405	1		T442	1
values[95]	76	1			T446	3		T405	1		T442	1
values[96]	79	1			T446	3		T405	1		T442	1
values[97]	85	1			T446	3		T405	1		T442	1
values[98]	71	1			T446	1		T405	1		T442	1
values[99]	85	1			T446	1		T405	1		T442	1
values[100]	97	1			T446	1		T405	1		T442	1
values[101]	105	1			T446	1		T405	1		T442	1
values[102]	74	1			T446	1		T405	1		T442	1
values[103]	88	1			T446	3		T405	1		T442	1
values[104]	89	1			T446	1		T405	1		T442	1
values[105]	69	1			T446	2		T405	1		T442	1
values[106]	68	1			T446	1		T405	2		T442	1
values[107]	75	1			T446	3		T405	1		T442	1
values[108]	85	1			T446	2		T405	1		T442	1
values[109]	73	1			T446	1		T405	1		T442	1
values[110]	84	1			T446	1		T405	1		T442	2
values[111]	80	1			T446	1		T405	1		T442	1
values[112]	76	1			T446	3		T405	1		T442	5
values[113]	62	1			T446	1		T405	1		T442	2
values[114]	73	1			T446	4		T405	2		T442	1
values[115]	78	1			T446	2		T405	1		T442	2
values[116]	98	1			T446	5		T405	3		T442	3
values[117]	83	1			T446	2		T405	6		T442	1
values[118]	93	1			T446	3		T405	1		T442	1
values[119]	78	1			T446	2		T405	3		T442	2
values[120]	84	1			T446	1		T405	11		T442	3
values[121]	81	1			T446	1		T405	4		T442	4
values[122]	81	1			T446	1		T405	1		T442	4
values[123]	89	1			T446	2		T405	4		T442	3
values[124]	79	1			T446	1		T405	4		T442	2
values[125]	70	1			T446	1		T405	3		T442	2
values[126]	109	1			T446	2		T405	2		T442	2
values[127]	1087	1			T446	25		T405	31		T442	41
values[128]	9393	1			T446	256		T405	313		T442	305