Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	144424	1			T80	83		T81	237		T82	3
values[2]	9530	1			T435	2		T409	7		T514	1
values[3]	3411	1			T409	10		T516	43		T511	1
values[4]	1787	1			T409	9		T516	41		T511	1
values[5]	1178	1			T409	5		T516	17		T511	1
values[6]	907	1			T409	10		T516	5		T511	1
values[7]	648	1			T409	7		T516	4		T511	1
values[8]	544	1			T409	6		T516	4		T511	1
values[9]	437	1			T409	7		T516	2		T511	1
values[10]	416	1			T409	6		T516	3		T511	1
values[11]	441	1			T409	5		T516	9		T511	1
values[12]	331	1			T409	5		T516	13		T511	1
values[13]	356	1			T409	17		T516	1		T511	1
values[14]	279	1			T409	12		T511	1		T447	2
values[15]	327	1			T409	10		T511	1		T447	6
values[16]	280	1			T409	4		T511	1		T447	1
values[17]	262	1			T409	8		T511	1		T447	6
values[18]	299	1			T409	3		T511	1		T447	7
values[19]	316	1			T409	3		T511	1		T447	28
values[20]	257	1			T409	15		T511	1		T447	32
values[21]	308	1			T409	8		T511	1		T447	25
values[22]	301	1			T409	11		T511	1		T447	12
values[23]	252	1			T409	4		T511	1		T447	1
values[24]	255	1			T409	3		T511	1		T832	8
values[25]	306	1			T409	8		T511	1		T832	24
values[26]	319	1			T409	20		T511	1		T832	7
values[27]	287	1			T409	9		T511	1		T832	14
values[28]	237	1			T409	6		T511	1		T832	5
values[29]	240	1			T409	6		T511	1		T832	3
values[30]	236	1			T409	4		T511	1		T832	7
values[31]	258	1			T409	5		T511	1		T832	10
values[32]	243	1			T409	9		T511	1		T832	6
values[33]	254	1			T409	6		T511	1		T832	4
values[34]	263	1			T409	4		T511	1		T832	11
values[35]	289	1			T409	4		T511	1		T832	8
values[36]	245	1			T409	8		T511	1		T832	3
values[37]	238	1			T409	6		T511	1		T832	7
values[38]	243	1			T409	5		T511	1		T832	15
values[39]	224	1			T409	4		T511	1		T832	10
values[40]	215	1			T409	8		T511	1		T832	3
values[41]	276	1			T409	13		T511	1		T832	15
values[42]	250	1			T409	14		T511	2		T832	10
values[43]	212	1			T409	7		T511	1		T832	2
values[44]	245	1			T409	4		T511	1		T832	4
values[45]	213	1			T409	6		T511	1		T832	6
values[46]	219	1			T409	6		T511	1		T832	7
values[47]	209	1			T409	5		T511	1		T832	10
values[48]	193	1			T409	8		T511	1		T832	5
values[49]	198	1			T409	7		T511	1		T832	4
values[50]	226	1			T409	3		T511	1		T832	5
values[51]	178	1			T409	3		T511	1		T832	3
values[52]	210	1			T409	25		T511	1		T832	18
values[53]	188	1			T409	10		T511	1		T832	15
values[54]	173	1			T409	5		T511	1		T832	6
values[55]	171	1			T409	13		T511	1		T832	7
values[56]	188	1			T409	12		T511	1		T832	13
values[57]	193	1			T409	4		T511	1		T832	9
values[58]	189	1			T409	9		T511	1		T832	6
values[59]	189	1			T409	11		T511	1		T832	5
values[60]	161	1			T409	11		T511	1		T832	13
values[61]	160	1			T409	14		T511	1		T832	12
values[62]	116	1			T409	3		T511	1		T837	1
values[63]	113	1			T409	5		T511	1		T837	1
values[64]	94	1			T409	10		T511	1		T837	1
values[65]	84	1			T409	6		T511	1		T837	1
values[66]	85	1			T409	6		T511	1		T837	1
values[67]	92	1			T409	6		T511	1		T837	1
values[68]	76	1			T409	4		T511	1		T837	1
values[69]	73	1			T409	2		T511	1		T837	1
values[70]	66	1			T511	1		T837	2		T457	7
values[71]	86	1			T511	1		T837	2		T457	9
values[72]	36	1			T511	1		T837	1		T457	7
values[73]	43	1			T511	1		T837	1		T457	7
values[74]	50	1			T511	1		T837	2		T457	3
values[75]	42	1			T511	1		T837	1		T457	5
values[76]	57	1			T511	1		T837	1		T457	6
values[77]	61	1			T511	1		T837	1		T457	10
values[78]	56	1			T511	1		T837	1		T457	4
values[79]	61	1			T511	1		T837	1		T457	3
values[80]	53	1			T511	3		T837	1		T457	8
values[81]	63	1			T511	7		T837	1		T457	3
values[82]	57	1			T511	11		T837	1		T457	5
values[83]	38	1			T511	2		T837	1		T457	3
values[84]	55	1			T511	1		T837	1		T457	7
values[85]	50	1			T511	1		T837	1		T457	4
values[86]	45	1			T511	3		T837	1		T457	3
values[87]	56	1			T511	6		T837	1		T457	4
values[88]	43	1			T511	4		T837	1		T457	3
values[89]	41	1			T511	3		T837	1		T457	3
values[90]	66	1			T511	1		T837	1		T457	10
values[91]	80	1			T511	3		T837	1		T457	10
values[92]	75	1			T511	1		T837	1		T457	13
values[93]	69	1			T511	3		T837	1		T457	9
values[94]	63	1			T511	1		T837	1		T457	12
values[95]	69	1			T511	7		T837	1		T457	5
values[96]	62	1			T511	3		T837	2		T457	5
values[97]	82	1			T511	2		T837	4		T457	4
values[98]	72	1			T511	3		T837	2		T457	8
values[99]	55	1			T511	1		T837	2		T457	4
values[100]	55	1			T511	2		T837	1		T457	9
values[101]	71	1			T511	8		T837	8		T457	17
values[102]	72	1			T511	6		T837	1		T457	17
values[103]	47	1			T511	2		T837	1		T457	8
values[104]	76	1			T511	6		T837	4		T457	9
values[105]	45	1			T511	1		T837	2		T457	2
values[106]	51	1			T511	1		T837	1		T457	5
values[107]	69	1			T511	2		T837	2		T457	10
values[108]	82	1			T511	1		T837	2		T457	7
values[109]	64	1			T511	2		T837	3		T457	7
values[110]	60	1			T511	3		T837	3		T457	15
values[111]	51	1			T511	1		T837	1		T457	14
values[112]	51	1			T511	4		T837	3		T457	7
values[113]	60	1			T511	3		T837	5		T457	6
values[114]	44	1			T511	1		T837	2		T457	4
values[115]	46	1			T511	2		T837	1		T457	5
values[116]	56	1			T511	7		T837	5		T457	6
values[117]	50	1			T511	2		T837	1		T457	5
values[118]	46	1			T511	3		T837	1		T457	7
values[119]	51	1			T511	1		T837	4		T457	8
values[120]	60	1			T511	3		T837	2		T457	11
values[121]	54	1			T511	1		T837	2		T457	8
values[122]	58	1			T511	7		T837	1		T457	5
values[123]	52	1			T511	1		T837	4		T457	5
values[124]	49	1			T511	1		T837	1		T457	11
values[125]	58	1			T511	1		T837	1		T457	25
values[126]	108	1			T511	1		T837	1		T457	42
values[127]	698	1			T511	19		T837	22		T457	128
values[128]	5207	1			T511	227		T837	312		T457	49