Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	146526	1			T80	99		T81	252		T82	2
values[2]	7605	1			T80	1		T82	1		T435	4
values[3]	3573	1			T446	1		T836	1		T672	48
values[4]	2105	1			T446	1		T672	46		T442	1
values[5]	1412	1			T446	1		T672	36		T442	1
values[6]	1180	1			T446	1		T672	46		T442	1
values[7]	968	1			T446	1		T672	51		T442	1
values[8]	791	1			T446	1		T672	29		T442	1
values[9]	668	1			T446	1		T672	21		T442	1
values[10]	633	1			T446	1		T672	31		T442	1
values[11]	635	1			T446	1		T672	22		T442	1
values[12]	520	1			T446	1		T672	15		T442	1
values[13]	582	1			T446	1		T672	20		T442	1
values[14]	519	1			T446	1		T672	11		T442	1
values[15]	562	1			T446	1		T672	21		T442	1
values[16]	467	1			T446	1		T672	32		T442	1
values[17]	445	1			T446	1		T672	18		T442	1
values[18]	530	1			T446	1		T672	12		T442	1
values[19]	517	1			T446	1		T672	27		T442	1
values[20]	460	1			T446	1		T672	27		T442	1
values[21]	479	1			T446	1		T672	25		T442	1
values[22]	540	1			T446	1		T672	21		T442	1
values[23]	466	1			T446	1		T672	29		T442	1
values[24]	424	1			T446	1		T672	23		T442	1
values[25]	482	1			T446	1		T672	24		T442	1
values[26]	485	1			T446	1		T672	19		T442	1
values[27]	490	1			T446	1		T672	16		T442	1
values[28]	413	1			T446	1		T672	23		T442	1
values[29]	436	1			T446	1		T672	20		T442	1
values[30]	436	1			T446	1		T672	24		T442	1
values[31]	357	1			T446	1		T672	19		T442	1
values[32]	333	1			T446	1		T672	11		T442	1
values[33]	384	1			T446	1		T672	14		T442	1
values[34]	410	1			T446	1		T672	18		T442	1
values[35]	442	1			T446	1		T672	21		T442	1
values[36]	470	1			T446	1		T672	11		T442	1
values[37]	366	1			T446	1		T672	6		T442	1
values[38]	321	1			T446	1		T672	8		T442	1
values[39]	364	1			T446	1		T672	6		T442	1
values[40]	364	1			T446	1		T672	20		T442	1
values[41]	339	1			T446	1		T672	10		T442	1
values[42]	319	1			T446	1		T672	21		T442	1
values[43]	331	1			T446	2		T672	4		T442	1
values[44]	274	1			T446	1		T672	15		T442	1
values[45]	287	1			T446	1		T672	15		T442	1
values[46]	311	1			T446	1		T672	5		T442	1
values[47]	305	1			T446	1		T672	21		T442	2
values[48]	272	1			T446	1		T672	8		T442	1
values[49]	219	1			T446	1		T672	9		T442	1
values[50]	232	1			T446	1		T672	11		T442	1
values[51]	230	1			T446	1		T672	5		T442	1
values[52]	223	1			T446	1		T672	7		T442	1
values[53]	175	1			T446	1		T442	1		T482	6
values[54]	150	1			T446	1		T442	1		T482	1
values[55]	161	1			T446	1		T442	1		T835	12
values[56]	127	1			T446	1		T442	1		T835	5
values[57]	106	1			T446	1		T442	1		T835	5
values[58]	120	1			T446	1		T442	1		T835	3
values[59]	129	1			T446	1		T442	1		T835	1
values[60]	119	1			T446	1		T442	1		T835	3
values[61]	91	1			T446	1		T442	1		T835	1
values[62]	98	1			T446	2		T442	1		T835	2
values[63]	101	1			T446	1		T442	1		T835	1
values[64]	109	1			T446	1		T442	1		T835	3
values[65]	99	1			T446	1		T442	1		T835	3
values[66]	100	1			T446	1		T442	1		T835	7
values[67]	120	1			T446	1		T442	1		T835	9
values[68]	116	1			T446	1		T442	1		T835	3
values[69]	106	1			T446	1		T442	1		T835	1
values[70]	129	1			T446	1		T442	1		T835	2
values[71]	123	1			T446	1		T442	1		T835	5
values[72]	92	1			T446	1		T442	1		T835	1
values[73]	119	1			T446	1		T442	2		T835	2
values[74]	138	1			T446	1		T442	1		T835	3
values[75]	151	1			T446	1		T442	1		T835	3
values[76]	97	1			T446	1		T442	1		T835	1
values[77]	111	1			T446	1		T442	1		T835	6
values[78]	113	1			T446	1		T442	1		T835	6
values[79]	83	1			T446	1		T442	1		T835	5
values[80]	91	1			T446	1		T442	1		T835	4
values[81]	119	1			T446	1		T442	1		T835	4
values[82]	153	1			T446	1		T442	1		T835	1
values[83]	129	1			T446	1		T442	1		T835	8
values[84]	120	1			T446	1		T442	1		T835	10
values[85]	107	1			T446	1		T442	1		T835	10
values[86]	101	1			T446	1		T442	1		T835	2
values[87]	104	1			T446	1		T442	1		T835	4
values[88]	104	1			T446	1		T442	1		T835	5
values[89]	106	1			T446	1		T442	1		T835	2
values[90]	91	1			T446	1		T442	1		T835	1
values[91]	95	1			T446	1		T442	1		T835	8
values[92]	86	1			T446	1		T442	1		T835	4
values[93]	103	1			T446	1		T442	1		T835	4
values[94]	111	1			T446	1		T442	1		T835	9
values[95]	90	1			T446	1		T442	1		T835	6
values[96]	97	1			T446	1		T442	1		T835	4
values[97]	84	1			T446	1		T442	1		T835	3
values[98]	95	1			T446	1		T442	1		T835	3
values[99]	85	1			T446	1		T442	1		T835	8
values[100]	81	1			T446	1		T442	1		T835	3
values[101]	94	1			T446	1		T442	1		T835	1
values[102]	82	1			T446	1		T442	5		T835	2
values[103]	76	1			T446	1		T442	2		T835	2
values[104]	70	1			T446	1		T442	2		T835	2
values[105]	61	1			T446	1		T442	3		T835	2
values[106]	93	1			T446	1		T442	1		T835	1
values[107]	78	1			T446	1		T442	1		T835	2
values[108]	67	1			T446	1		T442	4		T835	3
values[109]	74	1			T446	1		T442	1		T835	6
values[110]	77	1			T446	1		T442	1		T835	16
values[111]	65	1			T446	1		T442	3		T835	9
values[112]	53	1			T446	1		T442	1		T835	3
values[113]	67	1			T446	2		T442	3		T835	2
values[114]	66	1			T446	7		T442	2		T835	4
values[115]	57	1			T446	1		T442	1		T835	4
values[116]	54	1			T446	2		T442	1		T835	3
values[117]	52	1			T446	2		T442	2		T835	4
values[118]	44	1			T446	2		T442	3		T835	6
values[119]	49	1			T446	3		T442	5		T835	2
values[120]	46	1			T446	1		T442	1		T835	3
values[121]	48	1			T446	4		T442	1		T835	8
values[122]	54	1			T446	1		T442	1		T835	20
values[123]	51	1			T446	2		T442	5		T835	5
values[124]	48	1			T446	1		T442	3		T835	3
values[125]	59	1			T446	3		T442	1		T835	7
values[126]	97	1			T446	6		T442	3		T835	8
values[127]	1176	1			T446	76		T442	55		T835	11
values[128]	5459	1			T446	334		T442	287		T835	3