dashboard | hierarchy | modlist | groups | tests | asserts

Summary for Variable cp_error

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_error

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 121503 1 T80 75 T81 148 T88 9
auto[1] 64219 1 T80 8 T81 89 T82 3



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] 48199 1 T80 30 T81 31 T82 2



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 128921 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 56801 1 T80 31 T81 68 T82 1



Summary for Cross tl_d_chan_cov_cg_cc

Samples crossed: cp_opcode cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for tl_d_chan_cov_cg_cc

Bins
cp_opcodecp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] biggest_size 15434 1 T80 10 T81 6 T88 3

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%