dashboard | hierarchy | modlist | groups | tests | asserts

Summary for Variable cp_error

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_error

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 949559 1 T80 267 T81 2106 T82 14
auto[1] 533533 1 T80 451 T81 737 T82 22



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] 384605 1 T80 230 T81 366 T82 13



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 1030736 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 452356 1 T80 246 T81 683 T82 9



Summary for Cross tl_d_chan_cov_cg_cc

Samples crossed: cp_opcode cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for tl_d_chan_cov_cg_cc

Bins
cp_opcodecp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x1] biggest_size 122138 1 T80 86 T81 81 T82 5

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%