Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__core_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	158529	1			T72	79		T77	6		T79	6
values[2]	4142	1			T230	1		T528	2		T526	2
values[3]	1983	1			T529	1		T431	50		T450	81
values[4]	1532	1			T431	41		T450	69		T672	4
values[5]	1237	1			T431	16		T450	58		T672	4
values[6]	1037	1			T431	9		T450	61		T672	19
values[7]	908	1			T431	1		T450	31		T672	29
values[8]	739	1			T450	14		T672	17		T804	7
values[9]	741	1			T450	1		T672	17		T804	1
values[10]	583	1			T672	12		T537	8		T820	42
values[11]	504	1			T672	9		T537	2		T820	53
values[12]	539	1			T672	9		T820	41		T585	25
values[13]	601	1			T672	4		T820	43		T585	57
values[14]	518	1			T672	5		T820	31		T585	49
values[15]	461	1			T672	7		T820	37		T585	20
values[16]	544	1			T672	12		T820	24		T585	12
values[17]	518	1			T672	2		T820	13		T585	15
values[18]	375	1			T820	15		T585	11		T821	3
values[19]	316	1			T820	5		T585	14		T822	1
values[20]	288	1			T820	4		T585	7		T822	1
values[21]	213	1			T820	1		T585	9		T822	1
values[22]	183	1			T585	6		T822	1		T823	3
values[23]	216	1			T585	2		T822	1		T823	2
values[24]	215	1			T822	1		T823	7		T824	1
values[25]	227	1			T822	1		T824	1		T565	1
values[26]	178	1			T822	1		T824	1		T565	1
values[27]	174	1			T822	1		T824	1		T565	1
values[28]	137	1			T822	1		T824	1		T565	1
values[29]	141	1			T822	1		T824	1		T565	1
values[30]	176	1			T822	1		T824	1		T565	1
values[31]	121	1			T822	1		T824	1		T565	1
values[32]	91	1			T822	1		T824	1		T565	1
values[33]	94	1			T822	1		T824	1		T565	1
values[34]	82	1			T822	1		T824	1		T565	1
values[35]	91	1			T822	1		T824	1		T565	1
values[36]	102	1			T822	1		T824	1		T565	1
values[37]	99	1			T822	1		T824	1		T565	1
values[38]	102	1			T822	1		T824	1		T565	1
values[39]	121	1			T822	1		T824	1		T565	1
values[40]	89	1			T822	1		T824	1		T565	1
values[41]	74	1			T822	1		T824	1		T565	1
values[42]	74	1			T822	1		T824	1		T565	1
values[43]	83	1			T822	1		T824	1		T565	1
values[44]	77	1			T822	1		T824	1		T565	1
values[45]	58	1			T822	1		T824	1		T565	1
values[46]	40	1			T822	1		T824	1		T565	1
values[47]	40	1			T822	2		T824	1		T565	1
values[48]	32	1			T822	1		T824	1		T565	1
values[49]	25	1			T822	1		T824	1		T565	1
values[50]	27	1			T822	1		T824	1		T565	1
values[51]	25	1			T822	1		T824	1		T565	1
values[52]	30	1			T822	1		T824	1		T565	1
values[53]	28	1			T822	1		T824	1		T565	1
values[54]	30	1			T822	1		T824	1		T565	1
values[55]	24	1			T822	1		T824	1		T565	1
values[56]	28	1			T822	1		T824	1		T565	1
values[57]	27	1			T822	1		T824	1		T565	1
values[58]	28	1			T822	1		T824	1		T565	1
values[59]	23	1			T822	1		T824	1		T565	1
values[60]	26	1			T822	1		T824	1		T565	1
values[61]	26	1			T822	1		T824	1		T565	1
values[62]	28	1			T822	1		T824	1		T565	1
values[63]	27	1			T822	1		T824	1		T565	1
values[64]	28	1			T822	1		T824	1		T565	1
values[65]	28	1			T822	1		T824	1		T565	1
values[66]	29	1			T822	1		T824	1		T565	1
values[67]	28	1			T822	1		T824	1		T565	1
values[68]	25	1			T822	1		T824	1		T565	1
values[69]	27	1			T822	1		T824	1		T565	1
values[70]	30	1			T822	1		T824	1		T565	1
values[71]	31	1			T822	1		T824	1		T565	3
values[72]	44	1			T822	1		T824	1		T565	4
values[73]	38	1			T822	1		T824	1		T565	5
values[74]	34	1			T822	1		T824	1		T565	5
values[75]	42	1			T822	1		T824	1		T565	10
values[76]	33	1			T822	1		T824	1		T565	2
values[77]	32	1			T822	1		T824	1		T565	2
values[78]	31	1			T822	1		T824	1		T565	4
values[79]	27	1			T822	1		T824	1		T565	3
values[80]	39	1			T822	1		T824	1		T565	7
values[81]	36	1			T822	1		T824	1		T565	4
values[82]	39	1			T822	1		T824	1		T565	2
values[83]	32	1			T822	2		T824	1		T565	2
values[84]	36	1			T822	1		T824	1		T565	2
values[85]	43	1			T822	1		T824	1		T565	2
values[86]	38	1			T822	1		T824	1		T565	3
values[87]	44	1			T822	1		T824	1		T565	2
values[88]	45	1			T822	1		T824	1		T565	2
values[89]	51	1			T822	1		T824	1		T565	2
values[90]	35	1			T822	1		T824	1		T565	4
values[91]	46	1			T822	1		T824	1		T565	5
values[92]	45	1			T822	1		T824	1		T565	1
values[93]	45	1			T822	1		T824	1		T565	3
values[94]	41	1			T822	1		T824	1		T565	2
values[95]	41	1			T822	1		T824	2		T565	4
values[96]	47	1			T822	1		T824	1		T565	3
values[97]	53	1			T822	1		T824	1		T565	6
values[98]	42	1			T822	1		T824	1		T565	1
values[99]	34	1			T822	1		T824	1		T565	3
values[100]	31	1			T822	1		T824	1		T565	1
values[101]	38	1			T822	1		T824	1		T565	2
values[102]	35	1			T822	1		T824	1		T565	1
values[103]	53	1			T822	2		T824	1		T565	2
values[104]	48	1			T822	1		T824	1		T565	1
values[105]	63	1			T822	1		T824	1		T565	3
values[106]	60	1			T822	1		T824	1		T565	5
values[107]	42	1			T822	1		T824	1		T565	1
values[108]	48	1			T822	1		T824	1		T565	2
values[109]	61	1			T822	1		T824	1		T565	2
values[110]	52	1			T822	2		T824	1		T565	1
values[111]	63	1			T822	9		T824	1		T565	1
values[112]	52	1			T822	2		T824	1		T565	2
values[113]	51	1			T822	1		T824	1		T565	3
values[114]	69	1			T822	5		T824	1		T565	4
values[115]	67	1			T822	2		T824	1		T565	2
values[116]	59	1			T822	4		T824	1		T565	4
values[117]	65	1			T822	4		T824	3		T565	7
values[118]	51	1			T822	3		T824	1		T565	5
values[119]	58	1			T822	1		T824	2		T565	2
values[120]	42	1			T822	3		T824	2		T565	1
values[121]	58	1			T822	4		T824	5		T565	3
values[122]	51	1			T822	1		T824	8		T565	1
values[123]	44	1			T822	2		T824	4		T565	1
values[124]	62	1			T822	2		T824	2		T565	1
values[125]	89	1			T822	2		T824	4		T565	4
values[126]	322	1			T822	14		T824	10		T565	30
values[127]	2048	1			T822	107		T824	100		T565	85
values[128]	3953	1			T822	205		T824	220		T565	116