| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| falling | 485773 | 1 | T80 | 2725 | T82 | 270 | T462 | 4274 | ||||
| rising | 485796 | 1 | T80 | 2725 | T82 | 269 | T462 | 4274 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 741282 | 1 | T80 | 4073 | T82 | 400 | T462 | 6568 | ||||
| auto[1] | 1409097 | 1 | T80 | 7744 | T82 | 745 | T462 | 12204 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |