Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	142851	1			T78	6		T79	4		T80	699
values[2]	8002	1			T83	6		T542	2		T462	3
values[3]	3545	1			T540	5		T545	23		T416	20
values[4]	2288	1			T540	6		T545	14		T416	21
values[5]	1528	1			T540	8		T545	6		T416	20
values[6]	1080	1			T540	9		T545	1		T416	9
values[7]	967	1			T540	9		T416	34		T894	18
values[8]	761	1			T540	20		T416	13		T894	13
values[9]	698	1			T540	17		T416	18		T894	1
values[10]	726	1			T540	7		T416	19		T705	4
values[11]	598	1			T540	11		T416	32		T705	4
values[12]	577	1			T540	10		T416	21		T705	7
values[13]	608	1			T540	8		T416	17		T705	19
values[14]	614	1			T540	5		T416	30		T705	5
values[15]	634	1			T540	12		T416	7		T705	6
values[16]	529	1			T540	19		T416	20		T705	30
values[17]	488	1			T540	3		T416	24		T705	3
values[18]	525	1			T540	7		T416	11		T705	8
values[19]	606	1			T540	17		T416	17		T705	6
values[20]	529	1			T540	11		T416	12		T705	12
values[21]	551	1			T540	5		T416	4		T705	11
values[22]	460	1			T540	7		T416	8		T705	17
values[23]	530	1			T540	11		T416	7		T705	5
values[24]	500	1			T540	9		T416	4		T705	14
values[25]	468	1			T540	12		T416	23		T705	25
values[26]	475	1			T540	14		T416	12		T705	4
values[27]	452	1			T540	9		T416	8		T705	6
values[28]	406	1			T540	9		T416	11		T705	8
values[29]	392	1			T540	19		T416	4		T705	5
values[30]	458	1			T540	17		T416	14		T705	6
values[31]	462	1			T540	4		T416	30		T705	17
values[32]	414	1			T540	3		T416	10		T705	9
values[33]	398	1			T540	4		T416	5		T705	11
values[34]	420	1			T540	9		T416	11		T705	11
values[35]	379	1			T540	10		T416	4		T705	5
values[36]	358	1			T540	7		T416	5		T705	15
values[37]	392	1			T540	5		T416	9		T705	13
values[38]	351	1			T540	13		T416	11		T705	8
values[39]	361	1			T540	4		T416	10		T705	13
values[40]	338	1			T540	3		T416	9		T705	9
values[41]	423	1			T540	16		T416	11		T705	23
values[42]	327	1			T540	34		T705	4		T864	1
values[43]	280	1			T540	14		T705	5		T864	1
values[44]	307	1			T540	6		T705	3		T864	1
values[45]	247	1			T540	4		T705	8		T864	1
values[46]	242	1			T540	7		T705	6		T864	1
values[47]	233	1			T540	7		T864	1		T888	17
values[48]	208	1			T540	4		T864	2		T888	7
values[49]	216	1			T540	13		T864	1		T888	10
values[50]	165	1			T540	5		T864	1		T888	4
values[51]	181	1			T540	11		T864	1		T887	1
values[52]	131	1			T540	1		T864	1		T887	2
values[53]	111	1			T864	1		T887	2		T880	1
values[54]	95	1			T864	1		T887	3		T880	1
values[55]	113	1			T864	1		T887	10		T880	1
values[56]	60	1			T864	1		T887	5		T880	1
values[57]	71	1			T864	1		T887	10		T880	1
values[58]	34	1			T864	1		T887	3		T880	1
values[59]	50	1			T864	1		T887	6		T880	1
values[60]	30	1			T864	1		T887	3		T880	1
values[61]	30	1			T864	1		T887	1		T880	1
values[62]	29	1			T864	1		T887	3		T880	1
values[63]	27	1			T864	1		T887	3		T880	1
values[64]	29	1			T864	1		T887	1		T880	1
values[65]	36	1			T864	1		T887	4		T880	1
values[66]	35	1			T864	1		T887	2		T880	1
values[67]	34	1			T864	1		T887	2		T880	1
values[68]	45	1			T864	1		T887	6		T880	1
values[69]	39	1			T864	1		T887	4		T880	1
values[70]	35	1			T864	1		T887	2		T880	1
values[71]	49	1			T864	1		T887	5		T880	1
values[72]	66	1			T864	1		T887	1		T880	1
values[73]	37	1			T864	1		T887	2		T880	1
values[74]	38	1			T864	1		T887	4		T880	1
values[75]	43	1			T864	2		T887	4		T880	1
values[76]	44	1			T864	1		T887	7		T880	1
values[77]	34	1			T864	1		T887	3		T880	1
values[78]	35	1			T864	1		T887	5		T880	1
values[79]	51	1			T864	1		T887	3		T880	1
values[80]	71	1			T864	1		T887	15		T880	1
values[81]	84	1			T864	1		T887	23		T880	1
values[82]	65	1			T864	1		T887	13		T880	1
values[83]	52	1			T864	1		T887	5		T880	1
values[84]	52	1			T864	1		T887	6		T880	1
values[85]	50	1			T864	1		T887	4		T880	3
values[86]	40	1			T864	1		T887	4		T880	1
values[87]	47	1			T864	1		T887	8		T880	2
values[88]	60	1			T864	1		T887	5		T880	3
values[89]	51	1			T864	1		T887	3		T880	5
values[90]	50	1			T864	1		T887	7		T880	6
values[91]	50	1			T864	1		T887	9		T880	4
values[92]	52	1			T864	1		T887	14		T880	1
values[93]	65	1			T864	1		T887	4		T880	1
values[94]	41	1			T864	1		T887	3		T880	1
values[95]	39	1			T864	1		T887	4		T880	1
values[96]	50	1			T864	1		T887	4		T880	3
values[97]	49	1			T864	1		T887	7		T880	5
values[98]	49	1			T864	1		T887	11		T880	4
values[99]	49	1			T864	1		T887	9		T880	1
values[100]	49	1			T864	1		T887	5		T880	1
values[101]	48	1			T864	1		T887	5		T880	4
values[102]	40	1			T864	1		T887	4		T880	1
values[103]	54	1			T864	1		T887	2		T880	5
values[104]	53	1			T864	1		T887	1		T880	5
values[105]	44	1			T864	1		T880	1		T893	1
values[106]	49	1			T864	1		T880	4		T893	1
values[107]	42	1			T864	1		T880	1		T893	1
values[108]	42	1			T864	1		T880	3		T893	1
values[109]	37	1			T864	1		T880	2		T893	1
values[110]	47	1			T864	1		T880	3		T893	1
values[111]	37	1			T864	1		T880	1		T893	1
values[112]	32	1			T864	1		T880	1		T893	1
values[113]	33	1			T864	1		T880	2		T893	1
values[114]	31	1			T864	1		T880	1		T893	1
values[115]	34	1			T864	1		T880	1		T893	1
values[116]	35	1			T864	2		T880	2		T893	1
values[117]	32	1			T864	1		T880	2		T893	1
values[118]	28	1			T864	3		T880	2		T893	1
values[119]	42	1			T864	1		T880	4		T893	1
values[120]	32	1			T864	2		T880	2		T893	1
values[121]	34	1			T864	2		T880	2		T893	1
values[122]	36	1			T864	3		T880	2		T893	2
values[123]	37	1			T864	3		T880	2		T893	6
values[124]	38	1			T864	1		T880	1		T893	1
values[125]	48	1			T864	1		T880	2		T893	1
values[126]	80	1			T864	6		T880	3		T893	6
values[127]	1001	1			T864	45		T880	52		T893	67
values[128]	4796	1			T864	245		T880	228		T893	312