| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| falling | 4052 | 1 | T394 | 5 | T505 | 2 | T390 | 1 | ||||
| rising | 4096 | 1 | T394 | 5 | T498 | 1 | T505 | 2 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 162926 | 1 | T78 | 15 | T79 | 2 | T82 | 166 | ||||
| auto[1] | 22016 | 1 | T394 | 5 | T498 | 1 | T505 | 2 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |