Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.alert_handler_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	136914	1			T78	17		T79	4		T82	169
values[2]	10252	1			T83	126		T455	1		T394	6
values[3]	3946	1			T83	43		T394	2		T389	6
values[4]	2174	1			T83	17		T389	13		T397	45
values[5]	1368	1			T83	10		T389	18		T397	44
values[6]	1035	1			T83	19		T389	15		T397	56
values[7]	708	1			T83	11		T389	11		T397	12
values[8]	587	1			T389	10		T397	21		T508	1
values[9]	497	1			T389	16		T397	21		T508	1
values[10]	410	1			T389	10		T397	21		T508	1
values[11]	355	1			T389	13		T397	29		T508	1
values[12]	304	1			T389	12		T397	6		T508	1
values[13]	269	1			T389	10		T508	1		T499	5
values[14]	235	1			T389	30		T508	1		T499	7
values[15]	223	1			T389	11		T508	1		T499	7
values[16]	214	1			T389	16		T508	1		T499	6
values[17]	220	1			T389	6		T508	1		T499	9
values[18]	220	1			T389	24		T508	1		T499	12
values[19]	236	1			T389	27		T508	1		T499	3
values[20]	185	1			T389	17		T508	1		T499	6
values[21]	202	1			T389	17		T508	1		T499	9
values[22]	224	1			T389	15		T508	1		T499	9
values[23]	215	1			T389	14		T508	1		T499	9
values[24]	208	1			T389	12		T508	1		T499	7
values[25]	210	1			T389	17		T508	1		T499	5
values[26]	206	1			T389	15		T508	1		T499	9
values[27]	188	1			T389	17		T508	1		T499	10
values[28]	198	1			T389	17		T508	1		T499	5
values[29]	175	1			T389	9		T508	1		T499	2
values[30]	181	1			T389	6		T508	1		T499	11
values[31]	190	1			T389	10		T508	1		T499	7
values[32]	212	1			T389	11		T508	1		T499	3
values[33]	173	1			T389	10		T508	1		T499	3
values[34]	201	1			T389	12		T508	1		T499	16
values[35]	221	1			T389	45		T508	1		T499	17
values[36]	237	1			T389	16		T508	1		T499	13
values[37]	198	1			T389	24		T508	1		T499	4
values[38]	171	1			T389	10		T508	1		T499	2
values[39]	147	1			T389	9		T508	1		T761	1
values[40]	181	1			T389	8		T508	1		T761	1
values[41]	225	1			T389	28		T508	1		T761	1
values[42]	177	1			T389	20		T508	1		T761	1
values[43]	177	1			T389	19		T508	1		T761	1
values[44]	161	1			T389	9		T508	2		T761	1
values[45]	149	1			T389	8		T508	1		T761	1
values[46]	181	1			T389	11		T508	1		T761	1
values[47]	157	1			T389	11		T508	1		T761	1
values[48]	180	1			T389	17		T508	1		T761	1
values[49]	165	1			T389	28		T508	1		T761	1
values[50]	195	1			T389	11		T508	1		T761	1
values[51]	163	1			T389	7		T508	1		T761	1
values[52]	169	1			T389	7		T508	1		T761	1
values[53]	150	1			T389	3		T508	1		T761	1
values[54]	154	1			T389	7		T508	1		T761	1
values[55]	143	1			T389	3		T508	1		T761	1
values[56]	140	1			T389	3		T508	1		T761	1
values[57]	146	1			T389	3		T508	1		T761	1
values[58]	166	1			T389	4		T508	1		T761	1
values[59]	143	1			T389	5		T508	1		T761	1
values[60]	141	1			T389	4		T508	1		T761	1
values[61]	121	1			T389	9		T508	1		T761	1
values[62]	107	1			T389	7		T508	1		T761	1
values[63]	103	1			T389	5		T508	1		T761	1
values[64]	92	1			T389	10		T508	1		T761	2
values[65]	95	1			T389	7		T508	1		T761	1
values[66]	119	1			T389	14		T508	1		T761	1
values[67]	106	1			T389	8		T508	1		T761	1
values[68]	94	1			T389	4		T508	1		T761	1
values[69]	104	1			T389	4		T508	1		T761	1
values[70]	116	1			T389	6		T508	1		T761	1
values[71]	100	1			T389	3		T508	1		T761	1
values[72]	104	1			T389	11		T508	1		T761	1
values[73]	67	1			T389	4		T508	1		T761	1
values[74]	90	1			T389	5		T508	1		T761	1
values[75]	91	1			T508	1		T761	1		T762	1
values[76]	86	1			T508	2		T761	1		T762	1
values[77]	73	1			T508	1		T761	1		T762	1
values[78]	74	1			T508	1		T761	1		T762	1
values[79]	70	1			T508	1		T761	1		T762	1
values[80]	97	1			T508	1		T761	1		T762	1
values[81]	102	1			T508	1		T761	1		T762	1
values[82]	78	1			T508	1		T761	1		T762	1
values[83]	84	1			T508	1		T761	1		T762	1
values[84]	77	1			T508	1		T761	1		T762	1
values[85]	58	1			T508	1		T761	1		T762	1
values[86]	88	1			T508	1		T761	1		T762	1
values[87]	72	1			T508	1		T761	1		T762	1
values[88]	68	1			T508	1		T761	1		T762	1
values[89]	71	1			T508	1		T761	1		T762	1
values[90]	63	1			T508	1		T761	1		T762	1
values[91]	85	1			T508	1		T761	1		T762	1
values[92]	101	1			T508	1		T761	1		T762	1
values[93]	90	1			T508	1		T761	1		T762	1
values[94]	70	1			T508	1		T761	1		T762	1
values[95]	61	1			T508	1		T761	1		T762	1
values[96]	79	1			T508	1		T761	1		T762	1
values[97]	77	1			T508	1		T761	1		T762	1
values[98]	78	1			T508	1		T761	1		T762	1
values[99]	83	1			T508	1		T761	1		T762	1
values[100]	66	1			T508	1		T761	1		T762	1
values[101]	80	1			T508	3		T761	1		T762	1
values[102]	57	1			T508	7		T761	1		T762	1
values[103]	66	1			T508	1		T761	1		T762	1
values[104]	64	1			T508	1		T761	1		T762	1
values[105]	58	1			T508	1		T761	1		T762	1
values[106]	52	1			T508	3		T761	1		T762	1
values[107]	73	1			T508	2		T761	1		T762	1
values[108]	87	1			T508	2		T761	1		T762	4
values[109]	74	1			T508	1		T761	1		T762	2
values[110]	70	1			T508	9		T761	1		T762	5
values[111]	62	1			T508	2		T761	1		T762	4
values[112]	67	1			T508	2		T761	1		T762	2
values[113]	58	1			T508	1		T761	1		T762	2
values[114]	64	1			T508	1		T761	1		T762	2
values[115]	54	1			T508	2		T761	1		T762	1
values[116]	44	1			T508	2		T761	1		T762	2
values[117]	45	1			T508	2		T761	1		T762	1
values[118]	60	1			T508	4		T761	1		T762	4
values[119]	51	1			T508	2		T761	1		T762	2
values[120]	51	1			T508	2		T761	1		T762	1
values[121]	46	1			T508	2		T761	1		T762	2
values[122]	45	1			T508	1		T761	2		T762	2
values[123]	46	1			T508	1		T761	2		T762	4
values[124]	53	1			T508	2		T761	1		T762	1
values[125]	55	1			T508	1		T761	1		T762	3
values[126]	54	1			T508	2		T761	1		T762	2
values[127]	624	1			T508	24		T761	25		T762	31
values[128]	6313	1			T508	238		T761	294		T762	341

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	154597	1			T78	17		T79	5		T82	141
values[2]	4996	1			T83	7		T455	1		T394	6
values[3]	2503	1			T83	4		T394	3		T390	13
values[4]	1735	1			T83	4		T390	5		T397	1
values[5]	1297	1			T83	4		T390	1		T397	2
values[6]	979	1			T83	4		T397	3		T626	1
values[7]	919	1			T83	2		T397	3		T626	1
values[8]	807	1			T83	4		T397	2		T626	1
values[9]	802	1			T83	6		T397	4		T626	1
values[10]	728	1			T83	9		T397	4		T626	1
values[11]	607	1			T83	9		T397	4		T626	1
values[12]	468	1			T83	3		T397	2		T626	1
values[13]	433	1			T83	7		T397	3		T626	1
values[14]	440	1			T83	8		T397	2		T626	1
values[15]	438	1			T83	7		T397	7		T626	1
values[16]	421	1			T83	4		T397	6		T626	1
values[17]	388	1			T83	5		T397	2		T626	1
values[18]	390	1			T83	7		T397	3		T626	1
values[19]	389	1			T83	6		T397	1		T626	1
values[20]	382	1			T83	2		T397	2		T626	1
values[21]	448	1			T83	6		T397	2		T626	1
values[22]	365	1			T83	11		T397	4		T626	1
values[23]	315	1			T83	5		T397	1		T626	1
values[24]	247	1			T83	2		T397	1		T626	1
values[25]	199	1			T83	5		T397	4		T626	1
values[26]	204	1			T83	9		T397	1		T626	1
values[27]	217	1			T83	5		T397	5		T626	1
values[28]	214	1			T83	6		T397	1		T626	1
values[29]	128	1			T83	6		T397	1		T626	1
values[30]	96	1			T83	4		T397	3		T626	1
values[31]	132	1			T83	5		T397	1		T626	1
values[32]	163	1			T83	2		T397	2		T626	1
values[33]	169	1			T83	4		T397	4		T626	1
values[34]	145	1			T83	4		T397	1		T626	1
values[35]	151	1			T83	3		T397	2		T626	1
values[36]	142	1			T83	8		T397	2		T626	1
values[37]	101	1			T83	3		T397	3		T626	1
values[38]	86	1			T83	4		T397	2		T626	1
values[39]	98	1			T83	6		T397	3		T626	1
values[40]	114	1			T83	3		T397	5		T626	1
values[41]	102	1			T83	7		T397	2		T626	1
values[42]	99	1			T83	3		T397	2		T626	1
values[43]	95	1			T83	4		T397	2		T626	1
values[44]	81	1			T83	4		T397	4		T626	1
values[45]	75	1			T83	5		T397	7		T626	1
values[46]	63	1			T83	5		T397	3		T626	1
values[47]	86	1			T83	3		T397	2		T626	1
values[48]	79	1			T83	7		T397	5		T626	1
values[49]	74	1			T83	7		T397	2		T626	1
values[50]	54	1			T83	3		T397	2		T626	1
values[51]	54	1			T83	4		T397	11		T626	1
values[52]	38	1			T83	2		T397	6		T626	1
values[53]	44	1			T83	8		T397	3		T626	1
values[54]	46	1			T83	8		T397	5		T626	1
values[55]	42	1			T83	4		T397	6		T626	1
values[56]	43	1			T83	8		T397	3		T626	1
values[57]	41	1			T83	3		T397	1		T626	1
values[58]	43	1			T83	6		T397	2		T626	1
values[59]	45	1			T83	14		T397	1		T626	1
values[60]	41	1			T83	6		T397	4		T626	1
values[61]	41	1			T83	6		T397	3		T626	1
values[62]	42	1			T83	8		T397	2		T626	1
values[63]	43	1			T83	6		T397	2		T626	1
values[64]	41	1			T83	5		T397	2		T626	1
values[65]	43	1			T83	8		T397	2		T626	1
values[66]	36	1			T83	3		T397	1		T626	1
values[67]	39	1			T83	6		T397	1		T626	1
values[68]	39	1			T83	6		T397	2		T626	1
values[69]	45	1			T83	5		T397	4		T626	1
values[70]	43	1			T83	3		T397	3		T626	1
values[71]	46	1			T83	4		T397	2		T626	1
values[72]	42	1			T83	9		T397	1		T626	1
values[73]	48	1			T83	8		T397	2		T626	1
values[74]	36	1			T83	2		T397	2		T626	1
values[75]	46	1			T83	8		T397	2		T626	1
values[76]	43	1			T83	6		T397	2		T626	1
values[77]	49	1			T83	7		T397	1		T626	1
values[78]	51	1			T83	10		T397	2		T626	1
values[79]	43	1			T83	9		T397	2		T626	1
values[80]	47	1			T83	5		T397	2		T626	1
values[81]	49	1			T83	6		T397	1		T626	1
values[82]	57	1			T83	6		T397	1		T626	1
values[83]	44	1			T83	4		T397	2		T626	1
values[84]	55	1			T83	6		T397	3		T626	1
values[85]	51	1			T83	7		T397	5		T626	1
values[86]	52	1			T83	11		T397	1		T626	1
values[87]	44	1			T83	4		T397	2		T626	1
values[88]	57	1			T83	7		T397	5		T626	1
values[89]	56	1			T83	2		T397	1		T626	1
values[90]	47	1			T83	4		T397	2		T626	1
values[91]	59	1			T83	3		T397	7		T626	1
values[92]	48	1			T83	5		T397	2		T626	1
values[93]	57	1			T83	7		T397	2		T626	1
values[94]	71	1			T83	8		T397	3		T626	1
values[95]	72	1			T83	2		T397	1		T626	1
values[96]	64	1			T83	6		T397	1		T626	6
values[97]	72	1			T83	10		T397	3		T626	6
values[98]	53	1			T83	6		T397	1		T626	4
values[99]	67	1			T83	5		T397	3		T626	4
values[100]	58	1			T83	6		T397	2		T626	3
values[101]	73	1			T83	10		T397	3		T626	1
values[102]	62	1			T83	4		T397	3		T626	1
values[103]	76	1			T83	9		T397	3		T626	4
values[104]	90	1			T83	18		T397	8		T626	3
values[105]	71	1			T83	19		T397	3		T626	1
values[106]	71	1			T83	9		T397	3		T626	1
values[107]	76	1			T83	11		T397	1		T626	2
values[108]	67	1			T83	10		T397	1		T626	1
values[109]	57	1			T83	6		T397	2		T626	4
values[110]	63	1			T83	9		T397	2		T626	5
values[111]	75	1			T83	12		T397	2		T626	3
values[112]	72	1			T83	8		T397	2		T626	1
values[113]	81	1			T83	15		T397	1		T626	3
values[114]	86	1			T83	17		T397	1		T626	1
values[115]	78	1			T83	20		T397	1		T626	1
values[116]	77	1			T83	13		T397	7		T626	1
values[117]	92	1			T83	17		T397	7		T626	1
values[118]	105	1			T83	25		T397	8		T626	2
values[119]	90	1			T83	19		T397	5		T626	1
values[120]	95	1			T83	18		T397	9		T626	1
values[121]	104	1			T83	15		T397	9		T626	1
values[122]	82	1			T83	11		T397	2		T626	1
values[123]	110	1			T83	11		T397	9		T626	3
values[124]	155	1			T83	24		T397	20		T626	2
values[125]	234	1			T83	65		T397	45		T626	3
values[126]	629	1			T83	82		T397	104		T626	30
values[127]	2903	1			T83	58		T397	46		T626	151
values[128]	5364	1			T83	1		T397	3		T626	213

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	133358	1			T78	21		T79	6		T123	158
values[2]	8578	1			T123	167		T83	59		T394	6
values[3]	3315	1			T123	57		T83	27		T394	2
values[4]	2206	1			T123	40		T83	7		T393	37
values[5]	1488	1			T123	4		T83	1		T393	23
values[6]	993	1			T393	13		T508	1		T763	1
values[7]	707	1			T393	8		T508	1		T763	1
values[8]	529	1			T393	1		T508	1		T763	1
values[9]	411	1			T508	1		T763	1		T764	1
values[10]	397	1			T508	1		T763	1		T434	3
values[11]	357	1			T508	1		T763	1		T434	6
values[12]	386	1			T508	1		T763	1		T434	4
values[13]	380	1			T508	1		T763	1		T434	16
values[14]	329	1			T508	1		T763	1		T434	7
values[15]	325	1			T508	1		T763	1		T434	6
values[16]	307	1			T508	1		T763	1		T434	6
values[17]	314	1			T508	1		T763	1		T434	5
values[18]	296	1			T508	1		T763	1		T434	12
values[19]	326	1			T508	1		T763	1		T434	7
values[20]	357	1			T508	1		T763	1		T434	11
values[21]	338	1			T508	1		T763	1		T434	6
values[22]	354	1			T508	1		T763	1		T434	8
values[23]	352	1			T508	1		T763	1		T434	6
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