Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.csrng_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	156605	1			T78	21		T79	5		T82	157
values[2]	3916	1			T79	1		T83	3		T629	1
values[3]	1837	1			T397	7		T554	9		T443	49
values[4]	1507	1			T397	8		T554	13		T443	43
values[5]	1171	1			T397	1		T554	21		T443	39
values[6]	984	1			T397	1		T554	27		T443	22
values[7]	848	1			T397	2		T554	10		T443	12
values[8]	705	1			T397	1		T554	8		T443	8
values[9]	665	1			T397	2		T554	7		T443	10
values[10]	632	1			T397	1		T554	4		T443	7
values[11]	591	1			T397	3		T554	5		T443	18
values[12]	522	1			T397	2		T554	2		T443	22
values[13]	523	1			T397	2		T554	7		T443	25
values[14]	548	1			T397	1		T554	8		T443	32
values[15]	549	1			T397	3		T554	23		T443	33
values[16]	551	1			T397	2		T554	46		T443	22
values[17]	505	1			T397	3		T554	49		T443	16
values[18]	524	1			T397	4		T554	36		T443	26
values[19]	471	1			T397	4		T554	32		T443	9
values[20]	414	1			T397	1		T554	29		T443	5
values[21]	331	1			T397	3		T554	12		T443	4
values[22]	288	1			T397	3		T554	4		T443	1
values[23]	308	1			T397	3		T554	6		T762	1
values[24]	315	1			T397	2		T554	11		T762	1
values[25]	344	1			T397	1		T554	13		T762	1
values[26]	302	1			T397	2		T554	3		T762	1
values[27]	244	1			T397	3		T554	7		T762	1
values[28]	187	1			T397	6		T554	14		T762	1
values[29]	157	1			T397	4		T554	10		T762	1
values[30]	152	1			T397	3		T554	5		T762	1
values[31]	125	1			T397	2		T554	8		T762	1
values[32]	111	1			T397	2		T554	8		T762	1
values[33]	115	1			T397	2		T554	12		T762	1
values[34]	118	1			T397	3		T554	12		T762	1
values[35]	109	1			T397	1		T554	15		T762	1
values[36]	114	1			T397	2		T554	11		T762	1
values[37]	156	1			T397	4		T554	16		T762	1
values[38]	142	1			T397	5		T554	6		T762	1
values[39]	154	1			T397	1		T554	1		T762	1
values[40]	133	1			T397	1		T762	1		T440	4
values[41]	105	1			T397	2		T762	1		T440	2
values[42]	108	1			T397	2		T762	1		T440	1
values[43]	96	1			T397	3		T762	1		T440	3
values[44]	109	1			T397	2		T762	2		T440	6
values[45]	119	1			T397	4		T762	1		T440	5
values[46]	98	1			T397	2		T762	1		T440	3
values[47]	91	1			T397	2		T762	1		T440	2
values[48]	96	1			T397	3		T762	1		T440	1
values[49]	83	1			T397	1		T762	1		T440	1
values[50]	70	1			T397	3		T762	1		T440	2
values[51]	46	1			T397	3		T762	1		T440	1
values[52]	49	1			T397	3		T762	1		T440	2
values[53]	45	1			T397	1		T762	1		T440	2
values[54]	52	1			T397	3		T762	1		T440	1
values[55]	51	1			T397	3		T762	1		T440	3
values[56]	47	1			T397	4		T762	1		T440	2
values[57]	57	1			T397	3		T762	1		T440	3
values[58]	48	1			T397	1		T762	1		T440	1
values[59]	58	1			T397	2		T762	1		T440	5
values[60]	51	1			T397	2		T762	1		T440	1
values[61]	46	1			T397	2		T762	1		T440	2
values[62]	44	1			T397	1		T762	1		T440	2
values[63]	44	1			T397	1		T762	1		T440	2
values[64]	49	1			T397	5		T762	1		T440	1
values[65]	65	1			T397	2		T762	1		T440	1
values[66]	57	1			T397	1		T762	1		T440	3
values[67]	48	1			T397	1		T762	1		T440	1
values[68]	51	1			T397	6		T762	1		T440	1
values[69]	52	1			T397	3		T762	1		T440	1
values[70]	48	1			T397	1		T762	1		T440	1
values[71]	54	1			T397	2		T762	1		T440	1
values[72]	57	1			T397	2		T762	1		T440	5
values[73]	54	1			T397	3		T762	1		T557	3
values[74]	57	1			T397	1		T762	1		T557	3
values[75]	59	1			T397	1		T762	1		T557	4
values[76]	74	1			T397	3		T762	1		T557	6
values[77]	53	1			T397	2		T762	1		T557	3
values[78]	52	1			T397	2		T762	1		T557	4
values[79]	58	1			T397	3		T762	1		T557	2
values[80]	43	1			T397	1		T762	1		T557	2
values[81]	52	1			T397	3		T762	1		T557	7
values[82]	60	1			T397	3		T762	1		T557	7
values[83]	61	1			T397	2		T762	1		T557	5
values[84]	63	1			T397	2		T762	1		T557	5
values[85]	61	1			T397	1		T762	1		T557	7
values[86]	57	1			T397	1		T762	1		T557	10
values[87]	70	1			T397	4		T762	1		T557	12
values[88]	65	1			T397	3		T762	1		T557	6
values[89]	74	1			T397	4		T762	1		T557	9
values[90]	76	1			T397	4		T762	1		T557	7
values[91]	73	1			T397	3		T762	1		T557	6
values[92]	59	1			T397	5		T762	1		T557	7
values[93]	88	1			T397	5		T762	1		T557	12
values[94]	76	1			T397	4		T762	1		T557	10
values[95]	77	1			T397	4		T762	1		T557	6
values[96]	78	1			T397	5		T762	1		T557	4
values[97]	65	1			T397	4		T762	1		T557	9
values[98]	65	1			T397	4		T762	1		T557	7
values[99]	64	1			T397	4		T762	1		T557	2
values[100]	84	1			T397	6		T762	1		T557	6
values[101]	72	1			T397	3		T762	2		T557	8
values[102]	71	1			T397	3		T762	2		T557	6
values[103]	70	1			T397	2		T762	2		T557	8
values[104]	74	1			T397	7		T762	2		T557	8
values[105]	67	1			T397	7		T762	2		T557	7
values[106]	68	1			T397	2		T762	2		T557	10
values[107]	80	1			T397	6		T762	2		T557	15
values[108]	90	1			T397	3		T762	2		T557	10
values[109]	84	1			T397	5		T762	2		T557	10
values[110]	79	1			T397	4		T762	3		T557	14
values[111]	68	1			T397	2		T762	5		T557	7
values[112]	78	1			T397	3		T762	1		T557	12
values[113]	81	1			T397	6		T762	1		T557	7
values[114]	96	1			T397	7		T762	1		T557	5
values[115]	90	1			T397	3		T762	3		T557	8
values[116]	87	1			T397	2		T762	2		T557	11
values[117]	73	1			T397	2		T762	2		T557	5
values[118]	63	1			T397	2		T762	2		T557	3
values[119]	93	1			T397	6		T762	2		T557	12
values[120]	82	1			T397	5		T762	1		T557	11
values[121]	77	1			T397	1		T762	1		T557	8
values[122]	71	1			T397	2		T762	2		T557	8
values[123]	107	1			T397	2		T762	3		T557	16
values[124]	166	1			T397	14		T762	2		T557	18
values[125]	348	1			T397	43		T762	4		T557	58
values[126]	677	1			T397	90		T762	12		T557	83
values[127]	2616	1			T397	43		T762	128		T557	49
values[128]	4308	1			T397	1		T762	271		T557	5